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SI9185DMP-50-T1-E3

P1-P3P4-P6P7-P9P10-P12P13-P13
www.vishay.com
4
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Vishay Siliconix
Si9185
Notes:
a. Room = 25 °C, Full = - 40 °C to 85 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at V
OUT
≥ 2 V
are measured at V
OUT
= 3.3 V, while typical values for dropout voltage at V
OUT
< 2 V are measured at V
OUT
= 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 % below the output voltage measured
with a 1 V differential, provided that VIN does not drop below 2.0 V. When V
OUT(nom)
is less than 2.0 V, the output will be in regulation when
2.0 V - V
OUT(nom)
is greater than the dropout voltage specified.
e. The device’s shutdown pin includes a typical 6 MΩ internal pull-down resistor connected to ground.
f. V
OUT
is defined as the output voltage of the DUT at 1 mA.
g. The Error Output (Low) function is guaranteed for V
IN
≥ 2.0 V.
TIMING WAVEFORMS
SPECIFICATIONS
Parameter Symbol
Test Conditions
Unless Otherwise Specified
V
IN
= V
OUT(nom)
+ 1 V, I
OUT
= 1 mA,
C
IN
= 2.2 µF, C
OUT
= 2.2 µF, V
SD
= 1.5 V
Temp.
a
Limits
- 40 °C to 85 °C
Unit Min.
b
Typ.
c
Max.
b
Error Output
Output High Leakage
I
OFF
ERROR = V
OUT(nom)
Full 0.01 2 µA
Output Low Voltage
g
V
OL
I
SINK
= 2 mA
Full 0.4
V
Out-of-Regulation Error Flag
Threshold Voltage (Rising)
g
V
TH
Full
0.93 x
V
OUT
0.95 x
V
OUT
0.97 x
V
OUT
Hysteresis
g
V
HYST
Room
2 % x
V
OUT
Delay Pin Current Source
I
DELAY
Room 1.2 2.2 3.0 µA
Figure 4. Timing Diagram for Power-Up
V
IN
0.95 V
NOM
V
OUT
V
OUT
ERROR
V
NOM
t
DELAY
t
ON
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
5
Vishay Siliconix
Si9185
PIN CONFIGURATION
Additional voltage options are available.
2
3
4
8
7
6
5
C
NOISE
DELAY
GND
V
IN
SD
ERROR
SENSE or ADJ
V
OUT
Top View
1
MLP33 PowerPAK
8
7
6
5
1
2
3
4
C
NOISE
DELAY
GND
V
IN
SD
ERROR
SENSE or ADJ
V
OUT
Bottom View
MLP33 PowerPAK
Exposed Pad
PIN DESCRIPTION
Pin Number Name Function
1
C
NOISE
Noise bypass pin. For low noise applications, a 0.01 µF or larger ceramic capacitor should be connected
from this pin to ground.
2DELAY
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR
(Pin 7)
output. Refer to Figure 4.
3GND
Ground pin. Local ground for C
NOISE
and C
OUT
.
4
V
IN
Input supply pin. Bypass this pin with a 2.2 µF ceramic or tantalum capacitor to ground.
5
V
OUT
Output voltage. Connect C
OUT
between this pin and ground.
6 SENSE or ADJ
For fixed output voltage versions, this pin should be connected to V
OUT
(Pin 5). For adjustable output
voltage version, this voltage feedback pin sets the output voltage via an external resistor divider.
7ERROR
This open drain output is an error flag output which goes low when V
OUT
drops 5 % below its nominal
voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
8SD
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V
IN
if unused.
Exposed Pad The die substrate is attached to the exposed pad and must be electrically connected to GND.
ORDERING INFORMATION
Standard
Part Number
Lead (Pb)-free
Part Number
Marking Voltage Temperature Package
Si9185DMP-12-T1 Si9185DMP-12-T1-E3 8512 1.215 V
- 40 °C to 85 °C
MLP33
PowerPak
Si9185DMP-18-T1 Si9185DMP-18-T1-E3 8518 1.80 V
Si9185DMP-25-T1 Si9185DMP-25-T1-E3 8525 2.50 V
Si9185DMP-28-T1 Si9185DMP-28-T1-E3 8528 2.80 V
Si9185DMP-30-T1 Si9185DMP-30-T1-E3 8530 3.00 V
Si9185DMP-33-T1 Si9185DMP-33-T1-E3 8533 3.30 V
Si9185DMP-50-T1 Si9185DMP-50-T1-E3 8550 5.00 V
Si9185DMP-AD-T1 Si9185DMP-AD-T1-E3 85AD Adjustable
Eval Kit Temperature Range Board Type
Si9185DB - 40 to 85 °C Surface Mount
www.vishay.com
6
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Vishay Siliconix
Si9185
TYPICAL CHARACTERISTICS Internally Regulated, 25 °C, unless otherwise noted
Dropout Voltage vs. Load Current
Dropout Voltage vs. Temperature
Normalized Output Voltage vs. Load Current
0
50
100
150
200
250
300
0 100 200 300 400 500 600
I
LOAD
(mA)
)Vm(V
PORD
V
OUT
= 3.0 V
0
50
100
150
200
250
300
- 50 - 25 0 25 50 75 100 125 150
Junction Temperature (°C)
)V
m
(V
PORD
I
OUT
= 500 mA
I
OUT
= 200 mA
V
OUT
= 3.0 V
I
OUT
= 0 mA
I
OUT
= 10 mA
- 0.75
- 0.60
- 0.45
- 0.30
- 0.15
0.00
0.15
0.30
0 50 100 150 200 250 300 350 400 450 500
) %
(
e
g a t l
o V
t
u
p
t
u
O
Load Current (mA)
Dropout Characteristic
Dropout Voltage vs. V
OUT
Normalized V
OUT
vs. Temperature
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0123456
V
IN
(V)
)V(V
TUO
R
LOAD
= 16.5 Ω
0
50
100
150
200
250
300
350
400
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
) V m ( e g a t l o
V
t
u o p o r D
V
OUT
I
OUT
= 10 mA
I
OUT
= 200 mA
I
OUT
= 500 mA
- 1.0
- 0.8
- 0.6
- 0.4
- 0.2
0.0
0.2
- 40 - 20 0 20 40 60 80 100 120 140
Junction Temperature (°C)
)
%
(V
TUO
I
OUT
= 1 mA
I
OUT
= 500 mA
I
OUT
= 200 mA
P1-P3P4-P6P7-P9P10-P12P13-P13

SI9185DMP-50-T1-E3

Mfr. #:
Buy SI9185DMP-50-T1-E3
Manufacturer:
Vishay / Siliconix
Description:
LDO Voltage Regulators 500mA 5.0V CMOS w/Error Flag
Lifecycle:
New from this manufacturer.
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