NCV8675
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10
Figure 34. Application Circuits
100 nF
47 nF
GND
D
2
5
3
4
1
RO
NCV8675
C
D
C
in
C
out
22 mF
R
EXT
5.0 K
V
out
V
RO
V
in
I
out
I
RO
I
D
I
G
V
out
V
in
Circuit Description
The NCV8675 is an integrated low dropout regulator that
provides 5.0 V 350 mA, or 3.3 V 350 mA protected output
and a signal for power on reset. The regulation is provided
by a PNP pass transistor controlled by an error amplifier
with a bandgap reference, which gives it the lowest possible
drop out voltage and best possible temperature stability. The
output current capability is 350 mA, and the base drive
quiescent current is controlled to prevent over saturation
when the input voltage is low or when the output is
overloaded. The regulator is protected by both current limit
and thermal shutdown. Thermal shutdown occurs above
150°C to protect the IC during overloads and extreme
ambient temperatures. The delay time for the reset output is
adjustable by selection of the timing capacitor. See
Figure 34, Test Circuit, for circuit element nomenclature
illustration.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (V
out
) and drives the base of a
PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperaturestable output.
Saturation control of the PNP is a function of the load current
and input voltage. Oversaturation of the output power
device is prevented, and quiescent current in the ground pin
is minimized.
Regulator Stability Considerations
The input capacitor (C
in
) is necessary to stabilize the input
impedance to avoid voltage line influences. The output
capacitor helps determine three main characteristics of a
linear regulator: startup delay, load transient response and
loop stability. The capacitor value and type should be based
on cost, availability, size and temperature constraints.
Ceramic, tantalum, or electrolytic capacitors of 22 mF, or
greater, are stable with very low ESR values. Refer to
Figure 2 for specific ESR ratings. The aluminum
electrolytic capacitor is the least expensive solution, but, if
the circuit operates at low temperatures (25°C to 40°C),
both the capacitance and ESR of the capacitor will vary
considerably. The capacitor manufacturers data sheet
usually provides this information. The value for the output
capacitor C
out
shown in Figure 13, Test Circuit, should work
for most applications; however, it is not necessarily the
optimized solution.
Reset Output
The reset output is used as the power on indicator to the
microcontroller. This signal indicates when the output
voltage is suitable for reliable operation of the controller. It
pulls low when the output is not considered to be ready. RO
is pulled up to V
out
by an external resistor, typically 5.0 kW
in value. The input and output conditions that control the
Reset Output and the relative timing are illustrated in
Figure 35, Reset Timing. Output voltage regulation must be
maintained for the delay time before the reset output signals
a valid condition. The delay for the reset output is defined as
the amount of time it takes the timing capacitor on the delay
pin to charge from a residual voltage of 0 V to the upper
timing threshold voltage V
DU
of 1.3 V. The charging current
for this is I
D
of 4 mA and D pin voltage in steady state is
typically 2.4 V. By using typical IC parameters with a 47 nF
capacitor on the D Pin, the following time delay is derived:
t
RD
+ C
D
*V
DU
ńI
D
t
RD
+ 47 nF * (1.3 V)ń4 mA + 15.3 ms
Other time delays can be obtained by changing the C
D
capacitor value. The Delay Time can be reduced by
decreasing the capacitance of C
D
. Using the formula above,
Delay can be reduced as desired. Leaving the Delay Pin
open is not desirable as it can result in unwanted signals
being coupled onto the pin.
NCV8675
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11
Figure 35. Reset Timing
V
I
V
Q
V
D
V
RO
Reset
Delay Time
Reset
Reaction
Time
PoweronRe-
set
Thermal
Shutdown
Voltage Dip
at Input
Undervoltage Secondary
Spike
Overload
at Output
< Reset Reaction Time
t
t
t
t
V
Q,rt
Upper Timing Threshold
V
DU
Lower Timing Threshold
V
DL
dV
D
dt
+
Reset Charge Current
C
D
NCV8675
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12
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 36) is:
P
D(max)
+ [V
in(max)
* V
out(min)
]I
out(max)
(1)
) V
I(max)
I
q
where
V
in(max)
is the maximum input voltage,
V
out(min)
is the minimum output voltage,
I
out(max)
is the maximum output current for the
application,
I
q
is the quiescent current the regulator
consumes at I
Q(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
q
JA
can be calculated:
R
qJA
+
150° C *
T
A
P
D
(2)
The value of R
q
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
q
JA
s less than the calculated value in Equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
SMART
REGULATOR®
Iq
Control
Features
I
out
I
in
Figure 36. Single Output Regulator with Key
Performance Parameters Labeled
V
in
V
out
}
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
q
JA
:
R
qJA
+ R
qJC
) R
qCS
) R
qSA
(3)
where
R
q
JC
is the junctiontocase thermal resistance,
R
q
CS
is the casetoheatsink thermal resistance,
R
q
SA
is the heatsinktoambient thermal resistance.
R
q
JC
appears in the package section of the data sheet. Like
R
q
JA
, it too is a function of package type. R
q
CS
and R
q
SA
are
functions of the package type, heatsink and the interface
between them. These values appear in heatsink data sheets
of heatsink manufacturers.
Thermal, mounting, and heatsinking considerations are
discussed in the ON Semiconductor application note
AN1040/D.
COPPER AREA (mm
2
)
Figure 37. JA vs. Copper Spreader Area
THERMAL RESISTANCE JUNCTIONTOAIR
(°C/W)
R(t), (°C/W)
PULSE TIME (sec)
Figure 38. NCV8675 @ PCB Cu Area 100 mm
2
PCB Cu thk 1 oz
20
40
60
100
120
0 100 200 300 400 500 600 700 800 900
D
2
PAK 1 oz
D
2
PAK 2 oz
0.1
1
10
100
0.000001 0.0001 0.01 1 100
D
2
PAK
DPAK
DPAK 1 oz
DPAK 2 oz
80
Single Pulse

NCV8675DS50R4G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators NCV8675
Lifecycle:
New from this manufacturer.
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