7
LTC1430A
TEST CIRCUITS
Figure 4
SHDN
V
SHDN
I
MAX
FREQSET
COMP
SS
NC
NC
NC
NC
V
CC
PV
CC2
LTC1430A
PV
CC
PV
CC1
I
FB
GND PGND SENSE
+
SENSE
1430 F02
G1
G2
FB
NC
NC
NC
V
CC
Figure 2
Figure 3
LTC1430A
PV
CC1
5V
V
CC
V
COMP
V
FB
PV
CC2
GND
PGND
G1 RISE/FALL
G2 RISE/FALL
G1
G2
COMP
FB
10,000pF
1430 F03
10,000pF
10µF
0.1µF
+
+
C
IN
220µF
×4
C
OUT
330µF
×6
+
+
+
2.7µH/15A
PV
CC1
V
CC
FREQSET
SHDN
COMP
SS
PV
CC2
V
CC
V
IN
= 5V
PGND
GND
G1
I
FB
I
MAX
G2NC
1430 F04
SHUTDOWN
FB NC
SENSE
+
LTC1430A
SENSE
100
R
C
7.5k
C
C
4700pF
C1
220pF
1N4148
1µF
0.01µF
0.1µF
4.7µF
0.1µF
0.1µF
3.3V
Q1A, Q1B
2 IN PARALLEL
Q2
1k
16k
Q1A, Q1B, Q2: MOTOROLA MTD20N03HL
C
IN
: AVX-TPSE227M010R0100
C
OUT
: AVX-TPSE337M006R0100
8
LTC1430A
APPLICATIONS INFORMATION
WUU
U
OVERVIEW
T
he LTC1430A is a voltage feedback PWM switching
regulator controller (see Block Diagram) designed for use
in high power, low voltage step-down (buck) converters.
It includes an onboard PWM generator, a precision refer-
ence trimmed to ±0.5%, two high power MOSFET gate
drivers and all necessary feedback and control circuitry to
form a complete switching regulator circuit. The PWM
loop nominally runs at 200kHz.
The 16-lead versions of the LTC1430A include a current
limit sensing circuit that uses the upper external power
MOSFET as a current sensing element, eliminating the
need for an external sense resistor.
Also included in the 16-lead version is an internal soft start
feature that requires only a single external capacitor to
operate. In addition, 16-lead parts feature an adjustable
oscillator which can run at frequencies from 50kHz to
500kHz, allowing added flexibility in external component
selection. The 8-lead version does not include current
limit, internal soft start or frequency adjustability.
THEORY OF OPERATION
Primary Feedback Loop
The LTC1430A senses the output voltage of the circuit at
the output capacitor with the SENSE
+
and SENSE
pins
and feeds this voltage back to the internal transconduc-
tance amplifier FB. FB compares the resistor-divided out-
put voltage to the internal 1.265V reference and outputs an
error signal to the PWM comparator. This is then com-
pared to a fixed frequency sawtooth waveform generated
by the internal oscillator to generate a pulse width modu-
lated signal. This PWM signal is fed back to the external
MOSFETs through G1 and G2, closing the loop. Loop
compensation is achieved with an external compensation
network at COMP, the output node of the FB transconduc-
tance amplifier.
MIN, MAX Feedback Loops
Two additional comparators in the feedback loop provide
high speed fault correction in situations where the FB
amplifier may not respond quickly enough. MIN compares
the feedback signal to a voltage 40mV (3%) below the
internal reference. At this point, the MIN comparator
overrides the FB amplifier and forces the loop to full duty
cycle, set by the internal oscillator at about 93.5%. Simi-
larly, the MAX comparator monitors the output voltage at
3% above the internal reference and forces the output to
0% duty cycle when tripped. These two comparators
prevent extreme output perturbations with fast output
transients, while allowing the main feedback loop to be
optimally compensated for stability.
Current Limit Loop
The 16-lead LTC1430A devices include yet another feed-
back loop to control operation in current limit. The current
limit loop is disabled in the 8-lead device. The I
LIM
ampli-
fier monitors the voltage drop across external MOSFET Q1
with the I
FB
pin during the portion of the cycle when G1 is
high. It compares this voltage to the voltage at the I
MAX
pin.
As the peak current rises, the drop across Q1 due to its
R
DS(ON)
increases. When I
FB
drops below I
MAX
, indicating
that Q1’s drain current has exceeded the maximum level,
I
LIM
starts to pull current out of the external soft start
capacitor, cutting the duty cycle and controlling the output
current level. At the same time, the I
LIM
comparator
generates a signal to disable the MIN comparator to
prevent it from conflicting with the current limit circuit. If
the internal feedback node drops below about 0.8V, indi-
cating a severe output overload, the circuitry will force the
internal oscillator to slow down by a factor of as much as
100. If desired, the turn on time of the current limit loop
can be controlled by adjusting the size of the soft start
capacitor, allowing the LTC1430A to withstand short
overcurrent conditions without limiting.
By using the R
DS(ON)
of Q1 to measure the output current,
the current limit circuit eliminates the sense resistor that
would otherwise be required and minimizes the number of
components in the external high current path. Because
power MOSFET R
DS(ON)
is not tightly controlled and varies
with temperature, the LTC1430A current limit is not de-
signed to be accurate; it is meant to prevent damage to the
power supply circuitry during fault conditions. The actual
current level where the limiting circuit begins to take effect
may vary from unit to unit, depending on the power
MOSFETs used. See Soft Start and Current Limit for more
details on current limit operation.
9
LTC1430A
APPLICATIONS INFORMATION
WUU
U
MOSFET Gate Drive
Gate drive for the top N-channel MOSFET Q1 is supplied
from PV
CC1
. This supply must be above PV
CC
( the main
power supply input) by at least one power MOSFET
V
GS(ON)
for efficient operation. An internal level shifter
allows PV
CC1
to operate at voltages above V
CC
and PV
CC
,
up to 13V maximum. This higher voltage can be supplied
with a separate supply, or it can be generated using a
simple charge pump as shown in Figure 5. When using a
separate PV
CC1
supply, the PV
CC
input may exhibit a large
inrush current if PV
CC1
is present during power up. The
93.5% maximum duty cycle ensures that the charge pump
will always provide sufficient gate drive to Q1. Gate drive
for the bottom MOSFET Q2 is provided through PV
CC2
for
16-lead devices or V
CC
/PV
CC2
for the 8-lead device. PV
CC2
can usually be driven directly from PV
CC
with 16-lead
parts, although it can also be charge pumped or connected
to an alternate supply if desired. 3.3V input applications
use 3.3V at PV
CC
and 5V at V
CC
and PV
CC1
. See 3.3V Input
Supply Operation for more details. The 8-lead part
requires an RC filter from PV
CC
to V
CC
to ensure proper
operation; see Input Supply Considerations.
D
Z
12V
1N5242
OPTIONAL
USE FOR PV
CC
7V
LTC1430A
PV
CC1
PV
CC2
MBR0530T1
Q1
L1
Q2
G1
G2
PV
CC
C
OUT
V
OUT
1430 F05
0.1µF
+
Figure 5. Doubling Charge Pump
Q1
D1
V
IN
V
OUT
CONTROLLER
1430 F06a
Figure 6a. Classical Buck Architecture
Q1
V
IN
V
OUT
CONTROLLER
Q2
1430 F06b
Figure 6b. Synchronous Buck Architecture
much lower than the V
F
of the diode in the classical circuit.
This more than offsets the additional gate drive required
by the second MOSFET, allowing the LTC1430A to achieve
efficiencies in the mid-90% range for a wide range of load
currents.
Another feature of the synchronous architecture is that
unlike a diode, Q2 can conduct current in either direction.
This allows the output of a typical LTC1430A circuit to sink
current as well as sourcing it while remaining in regula-
tion. The ability to sink current at the output allows the
LTC1430A to be used with reactive or other nonconventional
loads that may supply current to the regulator as well as
drawing current from it. An example is a high current logic
termination supply, such as the GTL terminator shown in
the Typical Applications section.
EXTERNAL COMPONENT SELECTION
Power MOSFETs
Two N-channel power MOSFETs are required for most
LTC1430A circuits. These should be selected based pri-
marily on threshold and on-resistance considerations;
thermal dissipation is often a secondary concern in high
efficiency designs. Required MOSFET threshold should be
determined based on the available power supply voltages
and/or the complexity of the gate drive charge pump
Synchronous Operation
The LTC1430A uses a synchronous switching architec-
ture, with MOSFET Q2 taking the place of the diode in a
classical buck circuit (Figure 6). This improves efficiency
by reducing the voltage drop and the resultant power
dissipation across Q2 to V
ON
= (I)(R
DSON(Q2)
), usually

LTC1430AIGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi Pwr Buck Sw Reg Cntr
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