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LTC3868IUFD-1#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P38
LTC3868-1
19
38681fd
APPLICATIONS INFORMATION
Selection criteria for the power MOSFETs include the
on-resistance, R
DS(ON)
, Miller capacitance, C
MILLER
, input
voltage and maximum output current. Miller capacitance,
C
MILLER
, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C
MILLER
is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
fl at divided by the specifi ed change in V
DS
. This result is
then multiplied by the ratio of the application applied V
DS
to the gate charge curve specifi ed V
DS
. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle =
V
OUT
V
IN
Synchronous Switch Duty Cycle =
V
IN
− V
OUT
V
IN
The MOSFET power dissipations at maximum output
current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
()
2
1+δ
()
R
DS(ON)
+
V
IN
()
2
I
MAX
2
⎛
⎝
⎜
⎞
⎠
⎟
R
DR
()
C
MILLER
()
•
1
V
INTVCC
–V
THMIN
+
1
V
THMIN
⎡
⎣
⎢
⎤
⎦
⎥
f
()
P
SYNC
=
V
IN
–V
OUT
V
IN
I
MAX
()
2
1+δ
()
R
DS(ON)
where δ is the temperature dependency of R
DS(ON)
and
R
DR
(approximately 2) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V
THMIN
is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V
the high current effi ciency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher effi ciency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+ δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D1 and D2 shown in Figure 10
conduct during the dead-time between the conduction of
the two power MOSFETs. This prevents the body diode of
the bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in effi ciency at high V
IN
. A 1A
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
C
IN
and C
OUT
Selection
The selection of C
IN
is simplifi ed by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V
OUT
)(I
OUT
) product needs to be used in the
formula shown in Equation 1 to determine the maximum
RMS capacitor current requirement. Increasing the out-
put current drawn from the other controller will actually
decrease the input RMS ripple current from its maximum
value. The out-of-phase technique typically reduces the
input capacitor’s RMS ripple current by a factor of 30%
to 70% when compared to a single phase power supply
solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V
OUT
)/(V
IN
). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
IN
Required I
RMS
≈
I
MAX
V
IN
V
OUT
()
V
IN
–V
OUT
()
⎡
⎣
⎤
⎦
1/ 2
(1)
LTC3868-1
20
38681fd
APPLICATIONS INFORMATION
Figure 6. Setting Output Voltage
Equation 1 has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even signifi cant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3868-1, ceramic capacitors
can also be used for C
IN
. Always consult the manufacturer
if there is any question.
The benefi t of the LTC3868-1 2-phase operation can be
calculated by using Equation 1 for the higher power control-
ler and then calculating the loss that would have resulted
if both controller channels switched on at the same time.
The total RMS power lost is lower when both controllers
are operating due to the reduced overlap of current pulses
required through the input capacitor’s ESR. This is why
the input capacitor’s requirement calculated above for the
worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall benefi t of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the effi ciency testing.
The sources of the top MOSFETs should be placed within
1cm of each other and share a common C
IN
(s). Separating
the sources and C
IN
may produce undesirable voltage and
current resonances at V
IN
.
A small (0.1µF to 1µF) bypass capacitor between the chip
V
IN
pin and ground, placed close to the LTC3868-1, is
also suggested. A 10 resistor placed between C
IN
(C1)
and the V
IN
pin provides further isolation between the
two channels.
The selection of C
OUT
is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfi ed, the capacitance is adequate for fi ltering. The
output ripple (∆V
OUT
) is approximated by:
ΔV
OUT
≈ΔI
L
ESR+
1
8•f•C
OUT
⎛
⎝
⎜
⎞
⎠
⎟
where f is the operating frequency, C
OUT
is the output
capacitance and ∆I
L
is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ∆I
L
increases with input voltage.
Setting Output Voltage
The LTC3868-1 output voltages are each set by an exter-
nal feedback resistor divider carefully placed across the
output, as shown in Figure 6. The regulated output voltage
is determined by:
V
OUT
= 0.8V 1+
R
B
R
A
⎛
⎝
⎜
⎞
⎠
⎟
To improve the frequency response, a feedforward ca-
pacitor, C
FF
, may be used. Great care should be taken to
route the V
FB
line away from noise sources, such as the
inductor or the SW line.
1/2 LTC3868-1
V
FB
V
OUT
R
B
C
FF
R
A
38681 F05
Soft-Start (SS Pins)
The start-up of each V
OUT
is controlled by the voltage on
the respective SS pin. When the voltage on the SS pin
is less than the internal 0.8V reference, the LTC3868-1
regulates the V
FB
pin voltage to the voltage on the SS pin
instead of 0.8V. The SS pin can be used to program an
external soft-start function.
Soft-start is enabled by simply connecting a capacitor from
the SS pin to ground, as shown in Figure 7. An internal
1µA current source charges the capacitor, providing a
1/2 LTC3868-1
SS
C
SS
SGND
38681 F06
Figure 7. Using the SS Pin to Program Soft-Start
LTC3868-1
21
38681fd
APPLICATIONS INFORMATION
linear ramping voltage at the SS pin. The LTC3868-1 will
regulate the V
FB
pin (and hence V
OUT
) according to the
voltage on the SS pin, allowing V
OUT
to rise smoothly from
0V to its fi nal regulated value. The total soft-start time will
be approximately:
t
SS
= C
SS
•
0.8V
1µ A
INTV
CC
Regulators
The LTC3868-1 features two separate internal P-channel
low dropout linear regulators (LDO) that supply power
at the INTV
CC
pin from either the V
IN
supply pin or the
EXTV
CC
pin depending on the connection of the EXTV
CC
pin. INTV
CC
powers the gate drivers and much of the
LTC3868-1’s internal circuitry. The V
IN
LDO and the EXTV
CC
LDO regulate INTV
CC
to 5.1V. Each of these can supply a
peak current of 50mA and must be bypassed to ground
with a minimum of 4.7µF low ESR capacitor. No matter
what type of bulk capacitor is used, an additional 1µF ce-
ramic capacitor placed directly adjacent to the INTV
CC
and
PGND IC pins is highly recommended. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers and to prevent interaction
between the channels.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the
maximum junction temperature rating for the LTC3868-1
to be exceeded. The INTV
CC
current, which is dominated
by the gate charge current, may be supplied by either
the V
IN
LDO or the EXTV
CC
LDO. When the voltage on
the EXTV
CC
pin is less than 4.7V, the V
IN
LDO is enabled.
Power dissipation for the IC in this case is highest and is
equal to V
IN
• I
INTVCC
. The gate charge current is depen-
dent on operating frequency as discussed in the Effi ciency
Considerations section. The junction temperature can be
estimated by using the equations given in Note 2 of the
Electrical Characteristics. For example, the LTC3868-1
INTV
CC
current is limited to less than 22mA from a 28V
supply when not using the EXTV
CC
supply at 70°C ambient
temperature in the SSOP package:
T
J
= 70°C + (22mA)(28V)(90°C/W) = 125°C
To prevent the maximum junction temperature from be-
ing exceeded, the input supply current must be checked
while operating in forced continuous mode (PLLIN/MODE
= INTV
CC
) at maximum V
IN
.
When the voltage applied to EXTV
CC
rises above 4.7V, the
V
IN
LDO is turned off and the EXTV
CC
LDO is enabled. The
EXTV
CC
LDO remains on as long as the voltage applied to
EXTV
CC
remains above 4.5V. The EXTV
CC
LDO attempts
to regulate the INTV
CC
voltage to 5.1V, so while EXTV
CC
is less than 5.1V, the LDO is in dropout and the INTV
CC
voltage is approximately equal to EXTV
CC
. When EXTV
CC
is greater than 5.1V, up to an absolute maximum of 14V,
INTV
CC
is regulated to 5.1V.
Using the EXTV
CC
LDO allows the MOSFET driver and
control power to be derived from one of the LTC3868-1’s
switching regulator outputs (4.7V ≤ V
OUT
≤ 14V) during
normal operation and from the V
IN
LDO when the out-
put is out of regulation (e.g., start-up, short-circuit). If
more current is required through the EXTV
CC
LDO than
is specifi ed, an external Schottky diode can be added
between the EXTV
CC
and INTV
CC
pins. In this case, do
not apply more than 6V to the EXTV
CC
pin and make sure
that EXTV
CC
≤ V
IN
.
Signifi cant effi ciency and thermal gains can be realized
by powering INTV
CC
from the output, since the V
IN
cur-
rent resulting from the driver and control currents will be
scaled by a factor of (Duty Cycle)/(Switcher Effi ciency).
For 5V to 14V regulator outputs, this means connecting
the EXTV
CC
pin directly to V
OUT
. Tying the EXTV
CC
pin to
a 8.5V supply reduces the junction temperature in the
previous example from 125°C to:
T
J
= 70°C + (45mA)(8.5V)(90°C/W) = 87°C
However, for 3.3V and other low voltage outputs, addi-
tional circuitry is required to derive INTV
CC
power from
the output.
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LTC3868IUFD-1#TRPBF

Mfr. #:
Buy LTC3868IUFD-1#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 24Vin, Low IQ, Dual, 2-Phase Synchronous Step-Down Controller
Lifecycle:
New from this manufacturer.
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