Detailed Description
The MAX4959/MAX4960 provide up to +28V overvoltage
protection for low-voltage systems. When the input volt-
age exceeds the overvoltage trip level, the MAX4959/
MAX4960 turn off an external pFET to prevent damage
to the protected components.
The MAX4959/MAX4960 feature a control bit (CB) pin
that controls an external battery-switchover function that
switches in the battery when the adapter is unconnect-
ed. The host system detects when the battery switchover
must take place and pulls CB high to turn on P2. The
load current is not interrupted during battery switchover
as the body diode of P2 conducts until the CB line is dri-
ven high (see the
MAX4959 Typical Operating Circuit 1
,
Figure 4).
An additional safety feature latches off pFET P1 when a
low-power adapter is plugged in. This protects the sys-
tem from seeing repeated adapter insertions and
removals when an incorrect low-power adapter is
plugged in that cannot provide sufficient current.
Undervoltage Lockout (UVLO)
The MAX4959/MAX4960 have an adjustable undervolt-
age lockout threshold ranging from +5V to +28V. When
V
IN
is less than the V
UVLO
, the device waits for a blank-
ing time, t
BLANK
, to see if the fault still exists. If the fault
does not exist at the end of t
BLANK
, P1 remains on. If
V
IN
is less than V
UVLO
for longer than the blanking
time, the device turns P1 off and P1 does not turn on
again until V
IN
< 0.75V. See Figure 1.
Overvoltage Lockout (OVLO)
The MAX4959/MAX4960 have an adjustable overvolt-
age lockout threshold ranging from +6V to +28V. When
V
IN
is greater than the V
OVLO
, the device turns P1 off
immediately. When V
IN
drops below V
OVLO,
P1 turns on
again after the debounce time has elapsed.
Device Operation
High-Voltage Adapter (V
IN
> V
OVLO
)
If an adapter with a voltage higher than V
OVLO
is
plugged in, the MAX4959/MAX4960 is in an OVP condi-
tion, so P1 is kept off or immediately turned off. There is
MAX4959/MAX4960
High-Voltage OVP with Battery Switchover
5
Maxim Integrated
Pin Description
pFET Source Output. An internal resistor is connected between SOURCE1 and GATE1.
33IN
Voltage Input. IN is both the power-supply input and the overvoltage/undervoltage
sense input. Bypass IN to GND with a 1µF ceramic capacitor to get a ±15kV protected
input. A minimum 0.1µF ceramic capacitor is required for proper operation.
4 4 UVS
Undervoltage Threshold Set Input. Connect UVS to an external resistive divider from IN to
GND to set the undervoltage lockout threshold. (See Typical Operating Circuits.)
5 5 OVS
Overvoltage Threshold Set Input. Connect OVS to an external resistive divider from
IN to GND to set the overvoltage lockout threshold. (See Typical Operating Circuits.)
66V
DD
Inter nal P ow er - S up p l y Outp ut. Byp ass V
DD
to G N D w i th a 0.1µF m i ni m um cap aci tor .
V
DD
p ow er s the i nter nal p ow er - on r eset ci r cui ts. ( S ee the V
D D
C ap aci tor S el ecti on secti on.)
77CB
Battery Switchover Control Input. When CB is high, GATE1 is high (P1 is off), and GATE2
is low (P2 is on). When CB is low, GATE1 is controlled by internal logic and GATE2 is
high (P2 is off). GATE1 is controlled by CB only if V
UVLO
< V
IN
< V
OVLO
.
8 8 GND Ground
10 10 GATE2
pFET Gate Drive Output, Open Drain. When CB is high, GATE2 is low (P2 is on).
When CB is low, GATE2 is high impedance (P2 is off).
