NTHS4166NT1G

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4
TYPICAL PERFORMANCE CURVES
10 V
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
I
D
, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance vs. Gate-to-Source
Voltage
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 4. On-Resistance vs. Drain Current and
Gate Voltage
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
, DRAIN-TO-SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN-TO-SOURCE RESISTANCE (W)
Figure 5. On-Resistance Variation with
Temperature
T
J
, JUNCTION TEMPERATURE (°C)
Figure 6. Drain-to-Source Leakage Current
vs. Drain Voltage
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
R
DS(on)
, DRAIN-TO-SOURCE RESISTANCE
(NORMALIZED)
I
DSS
, LEAKAGE (nA)
V
DS
10 V
T
J
= 25°C
T
J
= -55°C
T
J
= 125°C
V
GS
= 4.5 V
V
GS
= 0 V
I
D
= 4.9 A
V
GS
= 10 V
T
J
= 150°C
T
J
= 125°C
T
J
= 25°C
4.5 V
3.0 V
3.6 V
2.8 V
3.2 V
3.4 V
I
D
= 4.9 A
T
J
= 25°C
V
GS
= 10 V
T
J
= 25°C
0
5
10
0 0.5 1 1.5 2 3
15
0
5
10
15
12 3 4
20
25
0.005
0.025
0.045
0.065
0.095
246810
0.010
0.018
136 8 10 1257911
0.013
0.020
0.015
0.023
0.6
0.8
1.0
1.2
1.4
-50 0 50 100 150
1.6
-25 25 75 125
100
1000
5101520 30
10000
0.015
0.035
0.055
0.075
14
10
2.5
0.085
0.025
0.028
0.030
25
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5
TYPICAL PERFORMANCE CURVES
C
rss
01015
DRAIN-TO-SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
Figure 7. Capacitance Variation
5
V
GS
= 0 V
T
J
= 25°C
C
oss
C
iss
V
GS
Figure 8. Gate-To-Source and Drain-To-Source
Voltage vs. Total Charge
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
Q
G
, TOTAL GATE CHARGE (nC)
I
D
= 4.9 A
T
J
= 25°C
Q
2
Q
1
Q
T
V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
I
S
, SOURCE CURRENT (AMPS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
R
G
, GATE RESISTANCE (OHMS)
t, TIME (ns)
V
GS
= 0 V
Figure 10. Diode Forward Voltage vs. Current
t
r
t
d(off)
t
d(on)
t
f
V
DD
= 15 V
I
D
= 4.9 A
V
GS
= 10 V
T
J
= 25°C
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
1 ms
10 ms
dc
20
T
J
, JUNCTION TEMPERATURE (°C)
I
D
= 20 A
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
EAS, SINGLE PULSE DRAIN-TO-SOURCE
AVALANCHE ENERGY (mJ)
0
200
400
600
800
1000
1200
1400
0812416
0
2
4
6
8
10
610 18214
1 10 100
1
10
100
1000
0.5 0.6 1.0
0
2
4
1
3
5
0.4 0.8
0.1 10 100
1
10
100
0.01
0.1
1 25 125
10
15
20
5
0
75 100 15050
25 30
0.7 0.9
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6
PACKAGE DIMENSIONS
ChipFETt
CASE 1206A-03
ISSUE H
E
A
b
e
e1
D
1234
8765
c
L
1234
8765
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
0.05 (0.002)
DIM
A
MIN NOM MAX MIN
MILLIMETERS
1.00 1.05 1.10 0.039
INCHES
b 0.25 0.30 0.35 0.010
c 0.10 0.15 0.20 0.004
D 2.95 3.05 3.10 0.116
E 1.55 1.65 1.70 0.061
e 0.65 BSC
e1 0.55 BSC
L 0.28 0.35 0.42 0.011
0.041 0.043
0.012 0.014
0.006 0.008
0.120 0.122
0.065 0.067
0.025 BSC
0.022 BSC
0.014 0.017
NOM MAX
1.80 1.90 2.00 0.071 0.075 0.079
H
E
5° NOM
q
5° NOM
H
E
q
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. GATE
5. SOURCE
6. DRAIN
7. DRAIN
8. DRAIN
SOLDERING FOOTPRINTS*
0.457
0.018
2.032
0.08
0.635
0.025
PITCH
0.66
0.026
ǒ
mm
inches
Ǔ
2.362
0.093
1
8X
8X
Basic
2.032
0.08
1.727
0.068
0.66
0.026
2.362
0.093
ǒ
mm
inches
Ǔ
0.457
0.018
1
2X
2X
Style 1
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NTHS4166NT1G

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MOSFET CHPFT SNGL 30V 8.2A NFET
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