AD7821
REV. B
–12–
APPLYING THE AD7821
The AD7821 is specified for a unipolar input range of 0 V to +5 V
and a bipolar input range of –2.5 V to +2.5 V. The V
REF
(–) and
V
REF
(+) voltages required for these input ranges are outlined
below. See the Typical Performance Characteristics section for
operation with unspecified input voltage ranges.
UNIPOLAR OPERATION
Figure 18 gives the configuration and reference voltages required
for 0 V to +5 V operation. The nominal transfer characteristic
for this input range is shown in Figure 19. The output code is
Natural Binary with 1 LSB = (5/256) V = 19.5 mV.
Figure 18. Unipolar/Bipolar Operation
Figure 19. Nominal Transfer Characteristic for Unipolar
(0 V to +5 V) Operation
BIPOLAR OPERATION
Figure 18 gives the configuration and reference voltages required
for –2.5 V to +2.5 V operation. The nominal transfer characteris-
tic for this input range is shown in Figure 20. The output code is
Offset Binary with 1 LSB = ([+2.5 – (–2.5)]/256) V = 19.5 mV.
Figure 20. Nominal Transfer Characteristic for Bipolar
(–2.5 V to +2.5 V) Operation
16-CHANNEL TELECOM A/D CONVERTER
The fast sampling rate (1 MHz) and bipolar operation of the
AD7821 makes it useful in telecom applications for sampling a
number of input channels using a multiplexer. Figure 21 shows
a circuit for such an application.
The maximum signal frequency required for acceptable quality
in telecom applications is 3 kHz. The circuit given in Figure 21
permits each of the 16-input channels to be sampled at a rate of
16 kHz maximum. The sampling rate takes into account such
multiplexer parameters as t
ON
, settling time, and so on. The
circuit also eases the problem of the antialiasing filter design by
sampling at a rate much greater than that required by the
Nyquist criterion.
AD7821
REV. B
–13–
Figure 21. 16-Channel Telecom ADC System
SIMULTANEOUS SAMPLING ADC
S
The AD7821’s inherent track-and-hold and well defined sampling
instant makes it useful in such applications as sonar, where a num-
ber of input channels are required to be sampled simultaneously.
Figure 22 shows a circuit for such an application.
Figure 22. Simultaneous Sampling ADCs
The actual sampling instant at which V
IN
is measured occurs
approximately 50 ns after the falling edge of WR or RD in the
WR-RD or RD modes, respectively, due to internal logic delays.
However, the internal logic delay and, therefore, the sampling
instant can vary from device to device, but is typically within ±5 ns.
This means that a maximum common input sine wave of ±2.5 V
at 32 kHz, applied to any number of AD7821s in the circuit of
Figure 22, will yield a maximum difference between the converter
outputs of typically ±1/4 LSB.
AD7821
REV. B
–14–
OUTLINE DIMENSIONS
20-Lead Plastic Dual-in-Line Package [PDIP]
(N-20)
Dimensions shown in inches and (millimeters)
20
1
10
11
0.985 (25.02)
0.965 (24.51)
0.945 (24.00)
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
SEATING
PLANE
0.015 (0.38) MIN
0.180 (4.57)
MAX
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.100
(2.54)
BSC
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095-AE
20-Lead Ceramic DIP - Glass Hermetic Seal [CERDIP]
(Q-20)
Dimensions shown in inches and (millimeters)
20
110
11
0.310 (7.87)
0.220 (5.59)
PIN 1
0.005
(0.13)
MIN
0.098 (2.49)
MAX
15
0
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.200 (5.08)
MAX
1.060 (26.92) MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.100
(2.54)
BSC
0.070 (1.78)
0.030 (0.76)
0.060 (1.52)
0.015 (0.38)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
20-Terminal Ceramic Leaded Chip Carrier [LCC]
(E-20A)
Dimensions shown in millimeters and (inches)
1
20
4
9
8
13
19
14
3
18
BOTTOM
VIEW
0.71 (0.0278)
0.56 (0.0220)
45 TYP
0.38 (0.0150)
MIN
1.40 (0.0551)
1.14 (0.0449)
1.27 (0.0500)
BSC
1.91 (0.0752)
REF
0.28 (0.0110)
0.18 (0.0071)
R TYP
2.41 (0.0949)
1.90 (0.0748)
2.54 (0.1000) BSC
5.08 (0.2000)
BSC
3.81 (0.1500)
BSC
1.91
(0.0752)
REF
9.09 (0.3579)
8.69 (0.3421)
SQ
9.09
(0.3579)
MAX
SQ
2.54 (0.1000)
1.63 (0.0642)
2.24 (0.0882)
1.37 (0.0539)
20-Lead Standard Small Outline Package [SOIC]
Wide Body
(RW-20)
Dimensions shown in millimeters and (inches)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-013AC
0.75 (0.0295)
0.25 (0.0098)
20 11
10
1
0.32 (0.0126)
0.23 (0.0091)
8
0
45
1.27 (0.0500)
0.40 (0.0157)
SEATING
PLANE
0.30 (0.0118)
0.10 (0.0039)
0.51 (0.0201)
0.33 (0.0130)
2.65 (0.1043)
2.35 (0.0925)
1.27
(0.0500)
BSC
10.65 (0.4193)
10.00 (0.3937)
7.60 (0.2992)
7.40 (0.2913)
13.00 (0.5118)
12.60 (0.4961)
COPLANARITY
0.10

AD7821KPZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Hi Spd uP-Compatible CMOS 8B Sampling
Lifecycle:
New from this manufacturer.
Delivery:
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