ww.yageo.com
May 25, 2004 V.1
Chip Resistor Surface Mount
3
9
SERIES
RT
(Pb Free)
DIMENSION
handbook, 4 columns
protective coat
resistive layer
inner electrode
end termination
ceramic substrate
MBE940_d
H
I
2
Fig. 5 Chip resistor construction
CONSTRUCTION
The resistors are constructed out of
a high-grade ceramic body. Internal
metal electrodes are added at each
end and connected by a resistive
material. The composition of the
resistive material is adjusted to give
the approximate required resistance
and laser cutting of this resistive
layer that achieves tolerance trims
the value. The resistive layer is
covered with a protective coat and printed with the resistance value. Finally, the two external terminations (pure Tin) are
added. See fig.5
MBE940_a
protective coat
W
L
I
1
Fig. 6 Chip resistor dimension
TYPE L (mm) W (mm) H (mm) I
1
(mm) I
2
(mm)
RT0201
0.6±0.10 0.30±0.05 0.25±0.05 0.15±0.10 0.15±0.10
RT0402
1.00±0.10 0.50±0.05 0.35±0.05 0.20±0.10 0.25±0.10
RT0603
1.60±0.10 0.80±0.10 0.45±0.10 0.25±0.15 0.25±0.15
RT0805
2.00±0.10 1.25±0.10 0.50±0.10 0.35±0.20 0.35±0.20
RT1206
3.10±0.10 1.60±0.10 0.55±0.10 0.45±0.20 0.40±0.20
RT1210
3.10±0.10 2.60±0.15 0.55±0.10 0.50±0.20 0.50±0.20
RT2010
5.00±0.10 2.50±0.15 0.55±0.10 0.60±0.20 0.50±0.20
RT2512
6.35±0.10 3.20±0.15 0.55±0.10 0.60±0.20 0.50±0.20
Table 2
POWER RATING
R
R
A
A
T
T
E
E
D
D
P
P
O
O
W
W
E
E
R
R
A
A
T
T
7
7
0
0
°
°
C
C
:
:
handbook, halfpage
70
10050
85
0
0
50
100
155
−55
T
amb
(°C)
Precision Standard Powr
125
(%P )
rated
P
max
MLB206_a
Fig. 7 Maximum dissipation (P
max
) in percentage of rated
power as a function of the operating ambient
temperature (T
amb
)
T
T
E
E
D
D
O
O
L
L
T
T
G
G
E
E
:
:
The DC or AC (rms) continuous working voltage
corresponding to the rated power is determined by
the following formula:
V=√(P X R)
Where
V=Continuous rated DC
or AC (rms) working voltage (V)
P=Rated power (W)
R=Resistance value (X)
For dimension see Table 2
