LTC3725
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Since the power dissipation of the linear regulator is
proportional to the input voltage, this strategy of making
the timeout inversely proportional to the input voltage
produces an approximately constant temperature excur-
sion for the external NMOS of the linear regulator regard-
less of the input voltage.
In situations for which the continuous operation of the
linear regulator does not exceed the thermal limitations of
the external NMOS (i.e. converters with low V
IN
or with
minimal gate drive bias requirements), the auxiliary sup-
ply can be omitted and the linear regulator allowed to
operate continuously. If I
NDRV
is less than 0.27mA the
linear regulator never times out and the voltage on the
SSFLT pin stays at approximately 2.8V after start-up is
completed. To accomplish this set:
R
VV
mA
PULLUP
IN MAX NDRV
>
()
.027
where V
IN(MAX)
is the maximum expected continuous
input voltage. Note that once the linear regulator is turned
off it locks out. Therefore when using this strategy, care
should be taken to ensure that a transient higher than
V
IN(MAX)
does not persist longer than t
TIMEOUT
.
In secondary-side operation with the LTC3706, there is
never any need for continuous operation of the linear
regulator since gate drive bias power is provided by the
LTC3706 through the pulse transformer and on-chip
rectifier. The LTC3725 shuts down the linear regulator
once the LTC3706 begins switching the pulse trans-
former. If the LTC3706 fails to start, the LTC3725 quickly
times out the linear regulator once the voltage on the
SSFLT pin reaches 2.8V.
Fault Lockout
The LTC3725 indicates a fault by pulling the SSFLT pin to
within 1V of V
CC
. The LTC3725 subsequently attempts a
restart. Optionally, the user can prevent restart and “lock
out” the converter by clamping the voltage on the SSFLT
pin with a 4.3V zener diode. Once the converter has locked
out it can only be restarted by the removal of the input
voltage or by release of the zener diode clamp.
Pulse Transformer
The pulse transformer that connects the LTC3706 to the
LTC3725 performs the dual functions of gate drive duty
cycle encoding and gate drive bias supply for the LTC3725
by way of the on-chip full-wave rectifier. The designs of the
LTC3725 and LTC3706 have been coordinated so that the
transformer turn ratio is:
N
LTC3725
= 2N
LTC3706
where N
LTC3725
is the number of turns in the winding
connected to the FB/IN
+
and FS/IN
pins of the LTC3725
and N
LTC3706
is the number of turns in the winding
connected to the PT
+
and PT
pins of the LTC3706. The
winding connected to the LTC3706 must be able to with-
stand volt-seconds equal to:
(–)Vs
V
f
MAX
CC
=
2
where V
CC
is the maximum supply voltage for the LTC3706
and f is the operating frequency of the LTC3706.
LTC3725
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former from their corresponding LTC3706. To synchro-
nize operation, the SSFLT and V
CC
pins of the master are
connected to the corresponding pins of all the slaves. The
master is designated by connection of the frequency set
resistor to the FS/IN
pin while this resistor is omitted from
the slaves. For the slaves the NDRV pin is connected to the
V
CC
pin. See the following section on PolyPhase Applica-
tions for more detail.
PolyPhase Applications
Figure 4 shows the basic connections for using the LTC3725
and LTC3706 in PolyPhase applications. One of the phases
is always identified as the “master,” while all other phases
are “slaves.” For the LTC3725 (primary side), the master
performs the open-loop start-up and supplies the initial
V
CC
voltage for the master and all slaves. The LTC3725
slaves are put into that mode by omitting the resistor on
FS/IN–. The LTC3725 slaves simply stand by and wait for
PWM signals from their respective pulse transformers.
Since the SSFLT pins of master and slave LTC3725s are
interconnected, a FAULT (overcurrent, etc.) on any one of
the phases will perform a shutdown/restart on all phases
together.
For the LTC3706, the master performs soft-start and
voltage-loop regulation by driving all slaves to the same
current as the master using the I
TH
pins. Faults and
shutdowns are communicated via the interconnection of
the RUN/SS pins. The LTC3706 is put into slave mode by
tying the FB pin to V
CC
.
Auxiliary Supply
When used with the LTC3706, the LTC3725 does not
require an auxiliary supply to provide primary-side gate-
drive bias current. After start-up, primary-side gate drive
current is provided by the LTC3706 through a small pulse
transformer and the LTC3725’s on-chip rectifier.
However, when used as a standalone primary-side con-
troller, the LTC3725 may require a conventional gate-drive
bias supply as shown in Figure 3. The bias supply must be
designed to keep the voltage on the V
CC
pin between the
absolute maximum of 15V and the gate-drive undervoltage
lockout of 7V.
The auxiliary supply is connected in parallel with V
CC
. The
linear regulator maintains V
CC
at 8V. If the auxiliary supply
produces more than 8V, it turns off the external NMOS
before the LTC3725 can time out the linear regulator. If the
auxiliary supply produces less than 8V, the linear regulator
times out and then the voltage on the V
CC
pin declines to
the voltage produced by the auxiliary supply.
Slave Mode Operation
When the LTC3725 is paired with the LTC3706, multiple
pairs can be used to form a PolyPhase converter. In
PolyPhase operation, one LTC3725 becomes the “master”
while the remainder become “slaves.” The master con-
trols start-up in the same manner as for the single-phase
converter, while the slaves do not begin switching until
receiving PWM information through their own pulse trans-
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Figure. 3. Auxiliary Supply for Primary-Side Control
POWER
TRANSFORMER
2.2µF
PRIMARY
WINDING N
P
SECONDARY
WINDING N
S
BAS21
BAS21
1mH
V
IN
LTC3725
3725 F03
NDRV
V
CC
GND
AUXILIARY
WINDING N
A
LTC3725
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Figure 4. Connections for PolyPhase
NDRV
UVLO
LTC3725
(MASTER)
V
CC
SS/FLT
FB/IN
+
FS/IN
V
IN
V
IN
+
V
IN
NDRV V
CC
PT
+
PT
RUN/SS
LTC3706
(MASTER)
ITH
3725 F04
V
OUT
+
V
BIAS
FB
FS/SYNC
NDRV
SS/FLT
LTC3725
(SLAVE)
V
CC
UVLO
FB/IN
+
FS/IN
V
IN
NDRV V
CC
PT
+
PT
RUN/SS
LTC3706
(SLAVE)
ITH
FB
PHASE
FS/SYNC
Standalone Primary-Side Operation
The LTC3725 can be used to implement a standalone
forward converter using optoisolator feedback and a
secondary-side voltage reference. Alternately the LTC3725
can be used to implement an open-loop forward converter
using the V
SLMT
pin to regulate against changes in V
IN
. In
either case, the LTC3725 oscillator determines the fre-
quency as found from:
f
R
OSC
FS P
=
+
21 10
4200
9
()
Note that polyphase operation is not possible in the stand-
alone configuration.
Grounding Considerations
The LT3725 is typically used in high current converter
designs that involve substantial switching transients. Fig-
ure 5 illustrates these currents. The switch driver on the IC
is designed to drive a large capacitance and, as such,
generate significant transient currents. Careful consider-
ation must be made regarding input and local power
supply bypassing to avoid corrupting the ground refer-
ences used by the UVLO and frequency set circuitry.
Typically, high current paths and transients from the input
supply and any local drive supplies must be kept isolated
from GND. By virtue of the topologies used in LT3725
applications, the large currents from the primary switch,
as well as the switch drive transients, pass through the
sense resistor to ground. This defines the ground connec-
tion of the sense resistor as the reference point for both
GND and PGND.

LTC3725EMSE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Primary Side Controller
Lifecycle:
New from this manufacturer.
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