1
FN8113.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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X4003, X4005
CPU Supervisor
These devices combine three popular functions; Power-on
Reset Control, Watchdog Timer and Supply Voltage
Supervision. This combination lowers system cost, reduces
board space requirements and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET
/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval,
the device activates the RESET
/RESET signal. The user
selects the interval from three preset values. Once selected,
the interval does not change, even after cycling the power.
The device’s low V
CC
detection circuitry protects the user’s
system from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
CC
trip point.
RESET
/RESET is asserted until V
CC
returns to proper
operating level and stabilizes. Five industry standard V
TRIP
thresholds are available; however, Intersil’s unique circuits
allow the threshold to be reprogrammed to meet custom
requirements, or to fine-tune the threshold for applications
requiring higher precision.
Features
Selectable watchdog timer
- Select 200ms, 600ms, 1.4s, off
•Low V
CC
detection and reset assertion
- Five standard reset threshold voltages nominal 4.62V,
4.38V, 2.92V, 2.68V, 1.75V
-Adjust low V
CC
reset threshold voltage using special
programming sequence
- Reset signal valid to V
CC
= 1V
Low power CMOS
- 12µA typical standby current, watchdog on
- 800nA typical standby current watchdog off
- 3mA active current
400kHz I
2
C interface
1.8V to 5.5V power supply operation
Available packages
- 8 Ld SOIC
- 8 Ld MSOP
Pb-free available (RoHS compliant)
Pinout
X4003, X4005
(8 LD SOIC, MSOP)
TOP VIEW
Block Diagram
NC
V
SS
V
CC
SDA
SCL
3
2
4
1
6
7
5
8
NC
WP
RESET
/RESET*
*RESET
APPLIES TO X4003
RESET APPLIES TO X4005
DATA
REGISTER
COMMAND
DECODE AND
CONTROL
LOGIC
SDA
SCL
V
CC
RESET AND
WATCHDOG
TIMEBASE
POWER-ON AND
GENERATION
+
-
RESET (X4003)
RESET
LOW VOLTAGE
CONTROL
REGISTER
WATCHDOG TRANSITION
DETECTOR
WP
V
CC
THRESHOLD
RESET LOGIC
RESET (X4005)
V
TRIP
WATCHDOG
TIMER RESET
Data Sheet June 30, 2008
N
O
T
RE
C
O
M
M
E
N
D
E
D
F
O
R
N
E
W
D
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S
I
G
N
S
N
O
R
E
C
O
M
M
E
N
D
E
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2
FN8113.2
June 30, 2008
Ordering Information
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART
MARKING
V
CC
RANGE
(V)
V
TRIP
RANGE
(V)
TEMP. RANGE
(°C) PACKAGE PKG. DWG. #
X4003M8-4.5A ACH X4005M8-4.5A ACQ 4.5 to 5.5 4.5 to 4.75 0 to +70 8 Ld MSOP
(3.0mm)
M8.118
X4003M8Z-4.5A
(Note)
DAH X4005M8Z-4.5A
(Note)
DAP 0 to +70 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8-4.5A X4003 AL X4005S8-4.5A X4005 AL 0 to +70 8 Ld SOIC
(150 mil)
MDP0027
X4003S8Z-4.5A
(Note)
X4003 ZAL X4005S8Z-4.5A
(Note)
X4005 ZAL 0 to +70 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8I-4.5A ACI X4005M8I-4.5A ACR -40 to +85 8 Ld MSOP
(3.0mm)
M8.118
X4003M8IZ-4.5A
(Note)
DAD X4005M8IZ-4.5A
(Note)
DAM -40 to +85 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8I-4.5A X4003 AM X4005S8I-4.5A X4005 AM -40 to +85 8 Ld SOIC
(150 mil)
MDP0027
X4003S8IZ-4.5A
(Note)
X4003 ZAM X4005S8IZ-4.5A
(Note)
X4005 ZAM -40 to +85 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8 ACJ X4005M8 ACS 4.25 to 4.5 0 to +70 8 Ld MSOP
(3.0mm)
M8.118
X4003M8Z (Note) DAE X4005M8Z (Note) DER 0 to +70 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8 X4003 X4005S8 X4005 0 to +70 8 Ld SOIC
(150 mil)
MDP0027
X4003S8Z (Note) X4003 Z X4005S8Z (Note) X4005 Z 0 to +70 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8I ACK X4005M8I ACT -40 to +85 8 Ld MSOP
(3.0mm)
M8.118
X4003M8IZ (Note) DAA X4005M8IZ
(Note)
DAJ -40 to +85 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8I X4003 I X4005S8I X4005 I -40 to +85 8 Ld SOIC
(150 mil)
MDP0027
X4003S8IZ (Note) X4003 ZI X4005S8IZ
(Note)
X4005 ZI -40 to +85 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8-2.7A ACL X4005M8-2.7A ACU 2.7 to 5.5 2.85 to 3.0 0 to +70 8 Ld MSOP
(3.0mm)
M8.118
X4003M8Z-2.7A
(Note)
DAG X4005M8Z-2.7A
(Note)
DAO 0 to +70 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8-2.7A X4003 AN X4005S8-2.7A X4005 AN 0 to +70 8 Ld SOIC
(150 mil)
MDP0027
X4003S8Z-2.7A
(Note)
X4003 ZAN X4005S8Z-2.7A
(Note)
X4005 ZAN 0 to +70 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8-2.7 ACN X4005M8-2.7 ACW 2.55 to 2.7 0 to +70 8 Ld MSOP
(3.0mm)
M8.118
X4003M8Z-2.7
(Note)
DAF X4005M8Z-2.7
(Note)
DAN 0 to +70 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8-2.7 X4003 F X4005S8-2.7 X4005 F 0 to +70 8 Ld SOIC
(150 mil)
MDP0027
X4003S8Z-2.7
(Note)
X4003 ZF X4005S8Z-2.7
(Note)
X4005 ZF 0 to +70 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003, X4005
3
FN8113.2
June 30, 2008
X4003S8I-2.7A X4003 AP X4005S8I-2.7A X4005 AP 2.7 to 3.6 2.85 to 3.0 -40 to +85 8 Ld SOIC
(150 mil)
MDP0027
X4003S8IZ-2.7A
(Note)
X4003 ZAP X4005S8IZ-2.7A
(Note)
X4005 ZAP -40 to +85 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8I-2.7A ACM X4005M8I-2.7A ACV -40 to +85 8 Ld MSOP
(3.0mm)
M8.118
X4003M8IZ-2.7A
(Note)
DAC X4005M8IZ-2.7A
(Note)
DAL -40 to +85 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
X4003S8I-2.7 X4003 G X4005S8I-2.7 X4005 G 2.55 to 2.7 -40 to +85 8 Ld SOIC
(150 mil)
MDP0027
X4003S8IZ-2.7
(Note)
X4003 ZG X4005S8IZ-2.7
(Note)
X4005 ZG -40 to +85 8 Ld SOIC
(150 mil) (Pb-free)
MDP0027
X4003M8I-2.7 ACO X4005M8I-2.7 ACX -40 to +85 8 Ld MSOP
(3.0mm)
M8.118
X4003M8IZ-2.7
(Note)
DAB X4005M8IZ-2.7
(Note)
DAK -40 to +85 8 Ld MSOP
(3.0mm) (Pb-free)
M8.118
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART
MARKING
V
CC
RANGE
(V)
V
TRIP
RANGE
(V)
TEMP. RANGE
(°C) PACKAGE PKG. DWG. #
Pin Descriptions
PIN
NUMBER
(MSOP) NAME FUNCTION
1 NC No internal connections
2 NC No internal connections
3 RESET
/RESET Reset Output. RESET/RESET is an active LOW/HIGH, open drain output which goes active whenever V
CC
falls below
the minimum V
CC
sense level. It will remain active until V
CC
rises above the minimum V
CC
sense level for 250ms.
RESET
/RESET goes active if the watchdog timer is enabled and SDA remains either HIGH or LOW longer than the
selectable Watchdog time out period. A falling edge of SDA, while SCL also toggles from HIGH to LOW followed by a
stop condition resets the watchdog timer. RESET
/RESET goes active on power-up and remains active for 250ms after
the power supply stabilizes.
4V
SS
Ground
5SDASerial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and
may be wire ORed with other open drain or open collector outputs. This pin requires a pull-up resistor and the input buffer
is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA while SCL also toggles from HIGH to LOW follow by a stop
condition resets the watchdog timer. The absence of this procedure within the watchdog time-out period results in
RESET
/RESET going active.
6SCLSerial Clock. The serial clock controls the serial bus timing for data input and output.
7WPWrite Protect. WP HIGH prevents changes to the watchdog timer setting.
8V
CC
Supply voltage
X4003, X4005

X4005S8IZ-2.7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Supervisory Circuits CPU SUP/WDT I2CS HI 6V IND 2 63VTRIP
Lifecycle:
New from this manufacturer.
Delivery:
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