4
FN8113.2
June 30, 2008
Principles of Operation
Power-on Reset
Application of power to the X4003/X4005 activates a power-on
reset circuit that pulls the RESET
/RESET pin active. This signal
provides several benefits:
• It prevents the system microprocessor from starting to
operate with insufficient voltage.
• It prevents the processor from operating prior to
stabilization of the oscillator.
• It allows time for an FPGA to download its configuration
prior to initialization of the circuit.
When V
CC
exceeds the device V
TRIP
threshold value for
200ms (nominal) the circuit releases RESET
/RESET, allowing
the system to begin operation.
Low Voltage Monitoring
During operation, the X4003/X4005 monitors the V
CC
level
and asserts RESET
/RESET if supply voltage falls below a
preset minimum V
TRIP
. The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The RESET
/RESET signal remains
active until the voltage drops below 1V. It also remains active
until V
CC
returns and exceeds V
TRIP
for 200ms.
Watchdog Timer
The watchdog timer circuit monitors the microprocessor
activity by monitoring the SDA and SCL pins. The
microprocessor must toggle the SDA pin HIGH to LOW
periodically, while SCL also toggles from HIGH to LOW (this
is a start bit) followed by a stop condition prior to the
expiration of the watchdog time-out period to prevent a
RESET
/RESET signal. The state of two nonvolatile control
bits in the control register determine the watchdog timer
period. The microprocessor can change these watchdog
bits, or they may be “locked” by tying the WP pin HIGH.
V
CC
Threshold Reset Procedure
The X4003/X4005 is shipped with a standard V
CC
threshold
(V
TRIP
) voltage. This value will not change over normal
operating and storage conditions. However, in applications
where the standard V
TRIP
is not exactly right, or if higher
precision is needed in the V
TRIP
value, the X4003/X4005
threshold may be adjusted. The procedure is described in
the following and uses the application of a nonvolatile control
signal.
Setting the V
TRIP
Voltage
This procedure is used to set the V
TRIP
to a higher voltage
value. For example, if the current V
TRIP
is 4.4V and the new
V
TRIP
is 4.6V, this procedure will directly make the change. If
the new setting is to be lower than the current setting, then it
is necessary to reset the trip point before setting the new
value.
To set the new V
TRIP
voltage, apply the desired V
TRIP
threshold voltage to the V
CC
pin and tie the WP pin to the
programming voltage V
P
. Then write data 00hto address
01h. The stop bit following a valid write operation initiates the
V
TRIP
programing sequence. Bring WP
LOW to complete the
operation.
SCL
SDA
0.6µs
0.6µs
START
CONDITION
STOP
CONDITION
RESTART
FIGURE 1. WATCHDOG RESTART
012 4567
SCL
SDA
A0h
01234567
01h
WP
V
P
= 15V TO 18V
01234567
00h
3
FIGURE 2. SET V
TRIP
LEVEL SEQUENCE (V
CC
= DESIRED V
TRIP
VALUE)
X4003, X4005
