HMC1099 Data Sheet
Rev. A | Page 12 of 16
12
10
8
6
4
2
0
0
0.1 0.2
0.3
0.4 0.5
0.6 0.7
0.8
0.9 1.0
1.1
NOISE FIGURE (dB)
FREQUENCY (GHz)
+85°C
+25°C
–40°C
13525-035
Figure 35. Noise Figure vs. Frequency at Various Temperatures
12
10
8
6
4
2
0
0 0.1 0.2
0.3 0.4 0.5
0.6 0.7 0.8
0.9 1.0 1.1
NOISE FIGURE (dB)
FREQUENCY (GHz)
24V
28V
32V
13525-037
Figure 36. Noise Figure vs. Frequency at Various Supply Voltages
12
10
8
6
4
2
0
0 0.1 0.2 0.3 0.4 0.5
0.6
0.7 0.8
0.9
1.0 1.1
NOISE FIGURE (dB)
FREQUENCY (GHz)
150mA
100mA
50mA
13525-036
Figure 37. Noise Figure vs. Frequency at Various Supply Currents
Data Sheet HMC1099
Rev. A | Page 13 of 16
THEORY OF OPERATION
The HMC1099 is a >1 0 W, gallium nitride (GaN), power amplifier
that consists of a single gain stage that effectively operates like a
single field effect transistor (FET). The device is internally
prematched so that a simple, external matching network
optimizes the performance across the entire operating
frequency range. The recommended dc bias conditions put the
device in deep Class AB operation, resulting in high saturated
output power (40.5 dBm typical) at improved levels of power
efficiency (69% typical).
HMC1099 Data Sheet
Rev. A | Page 14 of 16
APPLICATIONS INFORMATION
The drain bias voltage is applied through the RFOUT/V
DD
pin,
and the gate bias voltage is applied through the RFIN/V
GG
pin.
For operation of a single application circuit across the entire
frequency range, it is recommended to use the external matching
components specified in the typical application circuit (L1, C1, L3,
and C8) shown in Figure 38. If operation is only required across
a narrower frequency range, performance may be optimized
additionally through the implementation of alternate matching
networks. Capacitive bypassing of V
DD
and V
GG
is recommended.
The recommended power-up bias sequence follows:
1. Connect to the GND pin.
2. Set V
GG
to 8 V to pinch off the drain current.
3. Set V
DD
to 28 V (drain current is pinched off).
4. Adjust V
GG
more positive (approximately2.5 V to 3.0 V)
until a quiescent of I
DD
= 100 mA is obtained.
5. Apply the RF signal.
The recommended power-down bias sequence follows:
1. Turn off the RF signal.
2. Set V
GG
to 8 V to pinch off the drain current.
3. Set V
DD
t o 0 V.
4. Set V
GG
t o 0 V.
All measurements for this device were taken using the typical
application circuit, configured as shown in the assembly diagram
(see Figure 38). The bias conditions shown in the electrical
specifications table (see Table 1 to Table 3) are the operating
points recommended to optimize the overall performance.
Unless otherwise noted, the data shown was taken using the
recommended bias conditions. Operation of the HMC1099
under other bias conditions may provide performance that
differs from what is shown in the Typical Performance
Characteristics section.
The evaluation printed circuit board (PCB) provides the HMC1099
in its typical application circuit, allowing easy operation using
standard dc power supplies and 50 RF test equipment.
TYPICAL APPLICATION CIRCUIT
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
17
18
19
20
21
22
23
24
C2
2200pF
RFIN
L3
5.6nH
L1
5.4nH
R1
68.1
C4
2200pF
C7
10µF
C6
10µF
V
DD
V
GG
C8
3.3pF
C9
10µF
C10
10µF
C5
2200pF
L2
0.9µH
C1
3.3pF
C3
2200pF
RFOUT
13525-038
Figure 38. Typical Application Circuit

EV1HMC1099LP5D

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Development Tools Eval PCB ASSEMBLY
Lifecycle:
New from this manufacturer.
Delivery:
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