1
HI5741
14-Bit, 100MSPS, High Speed D/A
Converter
The HI5741 is a 14-bit, 100MSPS, D/A converter which is
implemented in the Intersil BiCMOS 10V (HBC-10) process.
Operating from +5V and -5.2V, the converter provides
20.48mA of full scale output current and includes an input
data register and bandgap voltage reference. Low glitch
energy and excellent frequency domain performance are
achieved using a segmented architecture. The digital inputs
are TTL/CMOS compatible and translated internally to ECL.
All internal logic is implemented in ECL to achieve high
switching speed with low noise. The addition of laser
trimming assures 14-bit linearity is maintained along the
entire transfer curve.
Features
Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . . 100MSPS
Low Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .650mW
Integral Linearity Error . . . . . . . . . . . . . . . . . . . . . . . 1 LSB
Low Glitch Energy . . . . . . . . . . . . . . . . . . . . . . . . . . 1pV-s
TTL/CMOS Compatible Inputs
Improved Hold Time. . . . . . . . . . . . . . . . . . . . . . . . 0.25ns
Excellent Spurious Free Dynamic Range
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Cellular Base Stations
Wireless Communications
Direct Digital Frequency Synthesis
Signal Reconstruction
Test Equipment
High Resolution Imaging Systems
Arbitrary Waveform Generators
Pinout
HI5741
(28 LD SOIC)
TOP VIEW
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE (°C) PACKAGE
PKG.
DWG. #
HI5741BIB HI5741BIB -40 to +85 28 Ld SOIC M28.3
HI5741BIB-T HI5741BIB 28 Ld SOIC Tape and Reel M28.3
HI5741BIBZ
(Note)
HI5741BIBZ -40 to +85 28 Ld SOIC
(Pb-free)
M28.3
HI5741BIBZ-T
(Note)
HI5741BIBZ 28 Ld SOIC Tape and Reel
(Pb-free)
M28.3
HI5741-EVS +25 Evaluation Board
(SOIC)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
D13 (MSB)
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DGND
REF OUT
CTRL AMP OUT
CTRL AMP IN
R
SET
I
OUT
ARTN
DV
EE
DGND
DV
CC
CLOCK
AGND
AV
EE
I
OUT
Data Sheet September 20, 2006 FN4071.12
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2000, 2001, 2003, 2004, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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2
FN4071.12
September 20, 2006
Typical Application Circuit
Functional Block Diagram
D11 (3)
D10 (4)
D9 (5)
D8 (6)
D7 (7)
D6 (8)
D5 (9)
D4 (10)
D11
D10
D9
D8
D7
D6
D5
D4
+5V
DV
CC
(16)
0.01F
DGND (17, 28)
CLK (15)
-5.2V (AV
EE
)
0.1F
(19) ARTN
(22) AV
EE
D/A OUT
(21) I
OUT
(20) I
OUT
(23) R
SET
976
64
(24) CTRL AMP IN
HI5741
D12
D13
D13 (MSB) (1)
D12 (2)
DV
EE
(18)
-5.2V (AV
EE
)
0.01F
(25) CTRL AMP OUT
(26) REF OUT
64
0.1F
-5.2V (DV
EE
)
0.01F0.1F
(27) AGND
50
D3 (11)
D2 (12)
D3
D2
D1 (13)
D1
D0 (LSB) (14)
D0
UPPER
SLAVE
I
OUT
(LSB) D0
D1
D2
D3
D4
D5
D6
D9
D7
D8
4-BIT
DECODER
R2R
NETWORK
I
OUT
+
-
CTRL AMP
REF OUT
R
SET
CTRL AMP
25
14-BIT
MASTER
REGISTER
OUT
15
SWITCHED
CURRENT
CELLS
10 LSBs
CURRENT
CELLS
D10
(MSB) D13
REGISTER
DATA
BUFFER/
LEVEL
SHIFTER
OVERDRIVEABLE
VOLTAGE
REFERENCE
IN
CLK
REF CELL
D11
D12
227 227
AV
EE
AGND DV
EE
DGND DV
CC
15 15
ARTN
HI5741
3
FN4071.12
September 20, 2006
Absolute Maximum ratings T
A
= +25°C Thermal Information
Digital Supply Voltage V
CC
to DGND . . . . . . . . . . . . . . . . . . . +5.5V
Negative Digital Supply Voltage DV
EE
to DGND . . . . . . . . . . -5.5V
Negative Analog Supply Voltage AV
EE
to AGND, ARTN. . . . . -5.5V
Digital Input Voltages (D13-D0, CLK) to DGND . . . . . DV
CC
to -0.5V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . 2.5mA
Voltage from CTRL AMP IN to AV
EE
. . . . . . . . . . . . . . . . 2.5V to 0V
Control Amplifier Output Current . . . . . . . . . . . . . . . . . . . . . 2.5mA
Reference Input Voltage Range. . . . . . . . . . . . . . . . . .-3.7V to AV
EE
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Thermal Resistance (Typical, Note 1)
JA
(°C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Maximum Junction Temperature
HI5741BIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications AV
EE
, DV
EE
= -4.94V to -5.46V, V
CC
= +4.75 to +5.25V, V
REF
= Internal,
T
A
= +25°C
PARAMETER TEST CONDITIONS
HI5741BI
T
A
= -40°C TO +85°C
UNITSMIN TYP MAX
SYSTEM PERFORMANCE
Resolution 14 - - Bits
Integral Linearity Error, INL
(Note 5)
“Best Fit Straight Line”, T
A
= +25°C -1.5 ±1.0 1.5 LSB
“Best Fit Straight Line”, T
A
= -40°C to +85°C -1.75 - 1.75 LSB
Differential Linearity Error, DNL (Note 5) T
A
= +25°C -1.0 ±0.5 1.0 LSB
Offset Error, I
OS
(Note 5) - 8 75 A
Full Scale Gain Error, FSE (Notes 3, 5) - 3.2 10 %
Full Scale Gain Drift With Internal Reference - ±150 - ppm
FSR/°C
Offset Drift Coefficient (Note 4) - - 0.05 A/°C
Full Scale Output Current, I
FS
- -20.48 - mA
Output Voltage Compliance Range (Note 4) -1.25 - 0 V
DYNAMIC CHARACTERISTICS
Throughput Rate (Note 4) 100 - - MSPS
Output Voltage Settling Time
(
1
/
16
th Scale Step Across Segment)
R
L
= 64(Note 4) - Settling to 0.024% - 11 - ns
R
L
= 64(Note 4) - Settling to 0.012% - 20 - ns
Singlet Glitch Area, GE (Peak) R
L
= 64(Note 4) - 1 - pVs
Output Slew Rate R
L
= 64DAC Operating in Latched Mode (Note 4) - 1,000 - V/s
Output Rise Time R
L
= 64DAC Operating in Latched Mode (Note 4) - 675 - ps
Output Fall Time R
L
= 64DAC Operating in Latched Mode (Note 4) - 470 - ps
Spurious Free Dynamic Range within a Window
(Note 4)
f
CLK
= 10 MSPS, f
OUT
= 1.23MHz, 2MHz Span - 87 - dBc
f
CLK
= 20 MSPS, f
OUT
= 5.055MHz, 2MHz Span - 77 - dBc
f
CLK
= 40 MSPS, f
OUT
= 16MHz, 10MHz Span - 75 - dBc
f
CLK
= 50 MSPS, f
OUT
= 10.1MHz, 2MHz Span - 80 - dBc
f
CLK
= 80 MSPS, f
OUT
= 5.1MHz, 2MHz Span - 78 - dBc
f
CLK
= 100 MSPS, f
OUT
= 10.1MHz, 2MHz Span - 79 - dBc
HI5741

HI5741BIBZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital to Analog Converters - DAC 28 INDTEMP D/A 14 BIT 100 MHZ -5 2V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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