MCP201
DS21730F-page 16 © 2007 Microchip Technology Inc.
2.3 AC Specifications
TABLE 2-1: MCP201 THERMAL SPECIFICATIONS
AC Specifications
Electrical Characteristics:
Unless otherwise indicated, all limits are specified for:
V
BAT = 6.0V to 18.0V
T
AMB = -40°C to +125°C
Symbol Parameter Min Typical Max Units Conditions
Bus Interface
|dV/dt| Slope Rising and Falling Edges 1.0 2.0 3.0 V/
µs (40% to 60%), No Load
|dV/dt| Slope Rising and Falling edges
ALTERNATE
2.0 4.0 6.0 V/µs(Note 1), No Load
t
TRANSPD
Propagation Delay of Transmitter 6.0 µst
RECPD
= max
t
RECPD
Propagation Delay of Receiver 6.0 µs(t
RECPDR
or t
RECPDF
)
t
RECSYM
Symmetry of Propagation Delay of
Receiver Rising Edge with Respect
to Falling Edge
-2.0 2.0 µst
RECSYM
= max
t
TRANSSYM
Symmetry of Propagation Delay of
Transmitter Rising Edge with
Respect to Falling Edge
-2.0 2.0 µst
TRANSSYM
= max
(t
TRANSPDF
- t
RANSPDR
)
Voltage Regulator
t
BACTVE
Bus Activity to Voltage Regulator
Enabled
10 40 µs Bus debounce time
t
VEVR
Voltage Regulator Enabled to
Ready
—50200µs (Note 2)
t
VREGPO
R Voltage Regulator Enabled to
Ready after POR
——2.5ms(Note 2) CLOAD = 25 nF
t
CSOR
Chip Select to Operation Ready 0 50 200 µs (Note 2)
t
CSPD
Chip Select to Power-down 0 40 µs (Note 2) No CLOAD
t
SHUTDOWN
Short-Circuit to Shutdown 450 µs Characterized but not
tested
t
SCREC Short-Circuit Recovery Time 2.0 ms Characterized but not
tested (Note 3)
Note 1: The mode does not conform to LIN Bus specification version 1.3.
2: Time depends on external capacitance and load.
3: Internal current limited. 2.0 ms typical recovery time (R
LBUS = 0Ω, TX = 0.4 VREG, VLBUS = VBAT, TAMB =
25C. Recovery time highly dependent on ambient temperature, package, and thermal resistance).
Sym Parameter Min Typical Max Units Test Conditions
θ
RECOVERY
Recovery Temperature
(junction temperature)
—+135 °C Characterized but not
tested
θ
SHUTDOWN
Shutdown Temperature
(junction temperature)
—+155 °C Characterized but not
tested
t
THERM
Thermal Recovery Time
(after Fault condition removed)
2.0 ms Characterized but not
tested (Note 1)
Note 1: Internal current limited. 2.0 ms typical recovery time (R
LBUS = 0Ω, TX = 0.4 VREG, VLBUS = VBAT, TAMB =
25C. Recovery time highly dependent on ambient temperature, package, and thermal resistance).
© 2007 Microchip Technology Inc. DS21730F-page 17
MCP201
2.4 Timing Diagrams and Specifications
FIGURE 2-1: BUS TIMING DIAGRAM
FIGURE 2-2: REGULATOR TIMING DIAGRAM ON CS/WAKE SIGNAL
.6 VBAT
.4 VBAT
TTRANSPDR
TRECPDR
TTRANSPDF
TRECPDF
TXD
L
BUS
RXD
TCSPD
TCSOR
CS/WAKE
VREG
Regulator Stable
MCP201
DS21730F-page 18 © 2007 Microchip Technology Inc.
FIGURE 2-3: REGULATOR TIMING DIAGRAM ON BUS ACTIVITY
FIGURE 2-4: POR DIAGRAM
LBUS
.4 VBAT
TVEVR
TBACTVE
VREG
Regulator Stable
VREG
tVREGPOR
VBAT
6V
5.0V

MCP201-E/SN

Mfr. #:
Manufacturer:
Microchip Technology
Description:
LIN Transceivers W/ On Board Vreg
Lifecycle:
New from this manufacturer.
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