AD622 Data Sheet
Rev. E | Page 12 of 16
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in
applications where there are strong RF signals. The disturbance
may appear as a small dc offset voltage. High frequency signals
can be filtered with a low-pass, RC network placed at the input
of the instrumentation amplifier, as shown in Figure 19. In
addition, this RC input network also provides additional input
overload protection (see the Input Protection section).
R
G
REF
V
OUT
+IN
–IN
AD622
+
0.1µF 10µF
+
0.1µF 10µF
+V
S
–V
S
C
C
1nF
C
D
47nF
C
C
1nF
R
4.02kΩ
R
4.02kΩ
00777-017
Figure 19. RFI Suppression Circuit for AD622 Series In-Amps
The filter limits the input signal bandwidth to the following
cutoff frequencies:
)(22
1
C
D
DIFF
CCR
FilterFreq
+π
=
C
CM
RC
FilterFreq
π
=
2
1
where C
D
≥ 10C
C
.
Figure 19 shows an example where the differential filter
frequency is approximately 400 Hz, and the common-mode
filter frequency is approximately 40 kHz. With this differential
filter in place and operating at gain of 1000, the typical dc offset
shift over a frequency range of 1 Hz to 20 MHz is less than 1.5 µV
RTI, and the RF signal rejection of the circuit is better than
71 dB. At a gain of 100, the dc offset shift is well below 1 mV
RTI, and RF rejection is greater than 70 dB.
The input resistors should be selected to be high enough to
isolate the sensor from the C
C
and C
D
capacitors but low
enough not to influence system noise. Mismatch between
R × C
C
at the positive input and R × C
C
at the negative input
degrades the CMRR of the AD622. Therefore, the C
C
capacitors
should be high precision types such as NPO/COG ceramics.
The tolerance of the C
D
capacitor is less critical.
GROUND RETURNS FOR INPUT BIAS CURRENTS
Input bias currents are those currents necessary to bias the
input transistors of an amplifier. There must be a direct return
path for these currents; therefore, when amplifying floating
input sources such as transformers or ac-coupled sources, there
must be a dc path from each input to ground as shown in
Figure 20, Figure 21, and Figure 22. Refer to the Designer’s
Guide to Instrumentation Amplifiers (free from Analog Devices,
Inc.) for more information regarding in-amp applications.
AD622
2
1
8
3
4
5
6
7
+V
S
–V
S
R
G
V
OUT
LOAD
–IN
+IN
REF
TO POWER
SUPPLY
GROUND
00777-018
Figure 20. Ground Returns for Bias Currents with Transformer Coupled Inputs
AD622
2
1
8
3
4
5
6
7
+V
S
–V
S
R
G
V
OUT
LOAD
–IN
+IN
REF
TO POWER
SUPPLY
GROUND
00777-019
Figure 21. Ground Returns for Bias Currents with Thermocouple Inputs
AD622
2
1
8
3
4
5
6
7
+V
S
–V
S
R
G
V
OUT
LOAD
–IN
+IN
REF
TO POWER
SUPPLY
GROUND
100kΩ 100kΩ
00777-020
Figure 22. Ground Returns for Bias Currents with AC-Coupled Inputs
Data Sheet AD622
Rev. E | Page 13 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONSARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
070606-A
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210 (5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
1
4
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
Figure 23. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONSARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A
A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 24. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
AD622 Data Sheet
Rev. E | Page 14 of 16
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
AD622ANZ −40°C to +85°C 8-Lead PDIP N-8
AD622AR
40°C to +85°C
8-Lead SOIC_N
R-8
AD622AR-REEL 40°C to +85°C 8-Lead SOIC_N R-8
AD622AR-REEL7 40°C to +85°C 8-Lead SOIC_N R-8
AD622ARZ
40°C to +85°C 8-Lead SOIC_N R-8
AD622ARZ-RL 40°C to +85°C 8-Lead SOIC_N R-8
AD622ARZ-R7 40°C to +85°C 8-Lead SOIC_N R-8
1
Z = RoHS Compliant Part.

AD622ARZ-RL

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