OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

CM2009-02QR

P1-P3P4-P6
CM2009
http://onsemi.com
4
Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
Parameter Conditions Min Typ Max Units
I
CC_VIDEO
V
CC_VIDEO
Supply Current V
CC_VIDEO
= 5.0 V; VIDEO inputs at V
CC_VIDEO
or GND
10
mA
I
CC_DDC
V
CC_DDC
Supply Current V
CC_DDC
= 5.0 V 10
mA
I
CC_SYNC
V
CC_SYNC
Supply Current
V
CC_SYNC
= 5 V; SYNC inputs at GND or
V
CC_SYNC
; SYNC outputs unloaded
50
mA
V
CC_SYNC
= 5 V; SYNC inputs at 3.0 V;
SYNC outputs unloaded
2.0 mA
V
F
ESD Diode Forward Voltage I
F
= 10 mA 1.0 V
V
IH
Logic High Input Voltage V
CC_SYNC
= 5.0 V; (Note 2) 2.0 V
V
IL
Logic Low Input Voltage V
CC_SYNC
= 5.0 V; (Note 2) 0.6 V
V
OH
Logic High Output Voltage I
OH
= 0 mA, V
CC_SYNC
= 5.0 V; (Note 2) 4.85 V
V
OL
Logic Low Output Voltage I
OL
= 0 mA, V
CC_SYNC
= 5.0 V; (Note 2) 0.15 V
R
OUT
SYNC Driver Output Resistance
(CM2009−00 only)
V
CC_SYNC
= 5.0 V; SYNC Inputs at GND or 3.0 V 65
W
R
OUT
SYNC Driver Output Resistance
(CM2009−02 only)
V
CC_SYNC
= 5.0 V; SYNC Inputs at GND or 3.0 V;
(Note ?)
15
W
V
OH−02
Logic High Output Voltage
(CM2009−02 only)
I
OH
= 24 mA; V
CC_SYNC
= 5.0 V;
(Note 2)
2.0 V
V
OL−02
Logic Low Output Voltage
(CM2009−02 only)
I
OL
= 24 mA; V
CC_SYNC
= 5.0 V;
(Note 2)
0.8 V
I
IN
Input Current
VIDEO Inputs
V
CC_VIDEO
= 5.0 V; V
IN
= V
CC_VIDEO
or GND ±1
mA
SYNC_IN1, SYNC_IN2 Inputs V
CC_SYNC
= 5.0 V; V
IN
= V
CC_SYNC
or GND ±1
mA
I
OFF
Level Shifting N−MOSFET ”OFF” State
Leakage Current
(V
CC_DDC
− V
DDC_IN
) ≤ 0.4 V;
V
DDC_OUT
= V
CC_DDC
10
mA
(V
CC_DDC
− V
DDC_OUT
) ≤ 0.4 V;
V
DDC_IN
= V
CC_DDC
10
mA
V
ON
Voltage Drop Across Level−shifting
N−MOSFET when “ON”
V
CC_DDC
= 2.5 V; V
S
= GND; I
DS
= 3 mA; 0.18 V
C
IN_VID
VIDEO Input Capacitance
V
CC_VIDEO
= 5.0 V; V
IN
= 2.5 V; f = 1 MHz;
(Note 4)
4 pF
V
CC_VIDEO
= 2.5 V; V
IN
= 1.25 V; f = 1 MHz;
(Note 4)
4.5 pF
t
PLH
SYNC Driver L => H Propagation Delay C
L
= 50 pF; V
CC
= 5.0 V; Input t
R
and t
F
≤ 5 ns 12 ns
t
PHL
SYNC Driver H => L Propagation Delay C
L
= 50 pF; V
CC
= 5.0 V; Input t
R
and t
F
≤ 5 ns 12 ns
t
R,
t
F
SYNC Driver Output Rise & Fall Times C
L
= 50 pF; V
CC
= 5.0 V; Input t
R
and t
F
≤ 5 ns 4 ns
V
ESD
ESD Withstand Voltage V
CC_VIDEO
= V
CC_SYNC
= 5 V; (Notes 3, 4 & ?) ±8 kV
1. All parameters specified over standard operating conditions unless otherwise noted.
2. These parameters apply only to the SYNC drivers. Note that R
OUT
= R
T
+ R
BUFFER
.
3. Per the IEC−61000−4−2 International ESD Standard, Level 4 contact discharge method. BYP, V
CC_VIDEO
and V
CC_SYNC
must be bypassed
to GND via a low impedance ground plane with a 0.2 mF, low inductance, chip ceramic capacitor at each supply pin. ESD pulse is applied
between the applicable pins and GND. ESD pulses can be positive or negative with respect to GND. Applicable pins are: VIDEO_1, VIDEO_2,
VIDEO_3, SYNC_OUT1, SYNC_OUT2, DDC_OUT1 and DDC_OUT2. All other pins are ESD protected to the industry standard ±2 kV
Human Body Model (MIL−STD−883, Method 3015). The bypass capacitor at the BYP pin may optionally be omitted, in which case the max.
ESD withstand voltage for the DDC_OUT1 and DDC_OUT2 pins is reduced to ±4 kV.
4. The SYNC_OUT pins on the CM2009−02 are guaranteed for 2 kV HBM ESD protection.
CM2009
http://onsemi.com
5
APPLICATION INFORMATION
Figure 1. Typical Application Connection Diagram
NOTES:
1. The CM2009 should be placed as close to the VGA or DVI−I connector as possible.
2. The ESD protection channels VIDEO_1, VIDEO_2, VIDEO_3 may be used interchangeably between the R, G, B
signals.
3. If differential video signal routing is used, the RED, BLUE, and GREEN signal lines should be terminated with
external 37.5 W resistors.
4. “VF” are external video filters for the RGB signals.
5. Supply bypass capacitors C1 and C2 must be placed immediately adjacent to the corresponding Vcc pins.
Connections to the Vcc pins and ground plane must be made with minimal length copper traces (preferably less than
5 mm) for best ESD protection.
6. The bypass capacitor for the BYP pin has been omitted in this diagram. This results in a reduction in the maximum
ESD withstand voltage at the DDC_OUT pins from ±8 kV to ±4 kV. If 8 kV ESD protection is required, a 0.2 mF
ceramic bypass capacitor should be connected between BYP and ground.
7. The SYNC buffers may be used interchangeably between HSYNC and VSYNC.
8. The EMI filters at the SYNC_OUT and DDC_OUT pins (C5 to C12, and Ferrite Beads FB1 to FB4) are for reference
only. The component values and filter configuration may be changed to suit the application.
9. The DDC level shifters DDC_IN, DDC_OUT, may be used interchangeably between DDCA_CLK and
DDCA_DATA.
10. R1, R2 are optional. They may be used, if required, to pull the DDC_CLK and DDC_DATA lines to VCC_5V when
no monitor is connected to the VGA connector. If used, it should be noted that “back current” may flow between the
DDC pins and VCC_5V via these resistors when VCC_5V is powered down.
11. For optimal ESD performance with the CM2009−02, an additional clamp device (such as the CMD PACDN042)
should be placed on HSYNC/VSYNC lines between the external matching resistor and the VGA connector.
CM2009
http://onsemi.com
6
PACKAGE DIMENSIONS
QSOP16
CASE 492
ISSUE A
E
M
0.25 C
A1
A2
C
DETAIL A
DETAIL A
h x 45
_
DIM MAXMIN
INCHES
A 0.053 0.069
b 0.008 0.012
L 0.016 0.050
e 0.025 BSC
h 0.009 0.020
c 0.007 0.010
A1 0.004 0.010
M 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION.
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH,
PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.005 PER SIDE. DIMENSION E1 DOES NOT
INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.005 PER SIDE. D AND E1 ARE
DETERMINED AT DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
__
b
L
6.40
16X
0.42
16X
1.12
0.635
DIMENSIONS: MILLIMETERS
16
PITCH
SOLDERING FOOTPRINT
9
18
D
D
16X
SEATING
PLANE
0.10 C
E1
A
A-B D
0.20
C
e
18
16 9
16X
C
M
D 0.193 BSC
E 0.237 BSC
E1 0.154 BSC
L2 0.010 BSC
D
0.25
C D
B
0.20 C D
2X
2X
2X 10 TIPS
0.10 C
H
GAUGE
PLANE
C
A2 0.049 ----
1.35 1.75
0.20 0.30
0.40 1.27
0.635 BSC
0.22 0.50
0.19 0.25
0.10 0.25
0 8
__
4.89 BSC
6.00 BSC
3.90 BSC
0.25 BSC
1.24 ----
MAXMIN
MILLIMETERS
L2
A
SEATING
PLANE
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
CM2009/D
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
P1-P3P4-P6

CM2009-02QR

Mfr. #:
Buy CM2009-02QR
Manufacturer:
ON Semiconductor
Description:
Video ICs VGA Port Circuit 15 Ohm
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet