Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
http://www.cirrus.com
DS734F5
OCT '11
CS485xx Family Data Sheet
Features
Cost-effective, High-performance 32-bit DSP
300,000,000 MAC/S (multiply accumulates per second)
Dual MAC cycles per clock
72-bit accumulators are the most accurate in the industry
24k x 32 SRAM, 2k blocks - assignable to data or program
Internal ROM contains a variety of configurable sound
enhancement feature sets
8-channel internal DMA
Internal watch-dog DSP lock-up prevention
DSP Tool Set w/ Private Keys for Protecting Customer IP
Configurable Serial Audio Inputs/Outputs
Configurable for all input/output types
Maximum 32-bit @ 192 kHz
Supports 32-bit audio sample I/O between DSP chips
TDM input modes (multiple channels on same line)
192 kHz SPDIF transmitter
Multi-channel DSD direct stream digital SACD input
Supports Two Different Input Fs Sample Rates
Output can be master or slave
Dual processing path capability
Input supports dual domain slave clocking
Hardware assist time sampling for sample rate conversion
Integrated Clock Manager/PLL
Can operate from external crystal, external oscillator
Input Fs Auto Detection
Host & Boot via Serial Interface
Configurable GPIOs and External Interrupt Input
1.8V Core and a 3.3V I/O that is tolerant to 5V input
Low-power Mode
“Energy Star
®
Ready” in low-power mode, 268 µW in standby
Differentiating from the legacy Cirrus multi-standard, multi-channel
decoders, this new CS485xx family is still based on the same
high-performance 32-bit fixed point Digital Signal Processor core
but instead is equipped with much less memory, tailoring it for more
cost-effective applications associated with multi-channel and
virtual-channel sound enhancements. Target applications are:
Digital Televisions
Multimedia Peripherals
iPod
®
Docking Stations
Automotive Head Units
Automotive Outboard Amplifiers
HD-DVD
and Blu-ray Disc
®
DVD Receivers
PC Speakers
There are also a wide variety of licensable DSP codes available
today as seen by the following examples:
Cirrus also has developed, or is developing their own royalty-free
versions of popular features sets like Cirrus Bass Manager, Cirrus
Dynamic Volume Leveler, Cirrus Original Multichannel Surround,
Cirrus Virtual Speaker & Cirrus 3D-Audio.
The CS485xx family is programmed using the Cirrus proprietary
DSP Composer
GUI development tool. Processing chains may be
designed using a drag-and-drop interface to place/utilize functional
macro audio DSP primitives. The end result is a software image that
is down-loaded to the DSP via serial host or serial boot modes.
See Section 6 for ordering information.
CS485xx Block Diagram
32-bit
DSP
D
M
A
P X Y
Serial
Control 1
12 Ch PCM
Audio Out
GPIO Debug
Watchdog
TMR1
TMR2
PLL
S/PDIF
12 Ch. Audio In /
6 Ch. SACD In
CS485xx
DS734F5 2
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find the one nearest you, go to www.cirrus.com.
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change
without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify,
before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order
acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information,
including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property
of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other
intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for
use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general
distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR
ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS
SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS.
INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES
NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR
PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS
THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS,
EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR
ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, DSP Composer, and Cirrus Framework are trademarks of Cirrus Logic, Inc. All other brand and product names in this
document may be trademarks or service marks of their respective owners.
Dolby, Dolby Digitaol, Dolby Headphone, Virtual Speaker, and Pro Logic are registered trademarks of Dolby Laboratories, Inc. Supply of an implementation of Dolby
Technology does not convey a license nor imply a right under any patent, or any other industrial or Intellectual Property Right of Dolby Laboratories, to use the Implementation
in any finished end-user or ready-to-use final product. It is hereby notified that a license for such use is required from Dolby Laboratories.
DTS and DTS Neo:6 are registered trademarks of Digital Theater Systems, Inc. It is hereby notified that a third-party license from DTS is necessary to distribute software of
DTS in any finished end-user or ready-to-use final product.
SRS, Circle Surround and Trusurround XT are registered trademarks of SRS Labs, Inc. Circle Surround II is a trademark of SRS Labs, Inc. The Circle Surround technology
is incorporated under license from SRS Labs, Inc. The Circle Surround technology rights incorporated in the CS485xx are owned by SRS Labs, a U.S. Corporation and
licensed to Cirrus Logic, Inc. Purchaser of CS485xx must sign a license for use of the chip and display of the SRS Labs trademarks. Any products incorporating the CS485xx
must be sent to SRS Labs for review. The Circle Surround technology is protected under US and foreign patents issued and/or pending. Circle Surround, SRS and (O) symbol
are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the purchase of the CS485xx, nor the corresponding sale of audio enhancement
equipment conveys the right to sell commercialized recordings made with any SRS technology/solution. SRS Labs requires all set makers to comply with all rules and
regulations as outlined in the SRS Trademark Usage Manual.
SPI is a trademark of Motorola, Inc.
I²C is a trademark of Philips Semiconductor.
iPod is a registered trademark of Apple Computer, Inc.
HD DVD is a trademark of DVD Format/Logo Licensing Corporation.
Blu-Ray Disc is a registered trademark of SONY KABUSHIKI KAISHA CORPORATION.
Energy Star is a registered trademark of the Environmental Protection Agency, a federal agency of the United States government.
3 DS734F5
TABLE OF CONTENTS
1 Documentation Strategy ........................................................................................................................................... 1-5
2 Overview ..................................................................................................................................................................... 2-5
2.1 Licensing ............................................................................................................................................................ 2-5
3 Code Overlays ............................................................................................................................................................ 3-6
4 Hardware Functional Description ............................................................................................................................ 4-7
4.1 DSP Core ........................................................................................................................................................... 4-7
4.1.1 DSP Memory ............................................................................................................................................. 4-7
4.1.2 DMA Controller .......................................................................................................................................... 4-7
4.2 On-chip DSP Peripherals ................................................................................................................................... 4-7
4.2.1 Digital Audio Input Port (DAI) .................................................................................................................... 4-7
4.2.2 Digital Audio Output Port (DAO) ................................................................................................................ 4-8
4.2.3 Serial Control Port (I
2
C
or SPI
) ............................................................................................................ 4-8
4.2.4 GPIO ......................................................................................................................................................... 4-8
4.2.5 PLL-based Clock Generator ...................................................................................................................... 4-8
4.2.6 Hardware Watchdog Timer ....................................................................................................................... 4-8
4.3 DSP I/O Description ........................................................................................................................................... 4-8
4.3.1 Multiplexed Pins ........................................................................................................................................ 4-8
4.3.2 Termination Requirements ........................................................................................................................ 4-8
4.3.3 Pads .......................................................................................................................................................... 4-9
4.4 Application Code Security .................................................................................................................................. 4-9
5 Characteristics and Specifications .......................................................................................................................... 5-9
5.1 Absolute Maximum Ratings ................................................................................................................................ 5-9
5.2 Recommended Operations Conditions ............................................................................................................... 5-9
5.3 Digital DC Characteristics ................................................................................................................................... 5-9
5.4 Power Supply Characteristics ........................................................................................................................... 5-10
5.5 Thermal Data (48-pin LQFP) ............................................................................................................................ 5-10
5.6 Switching Characteristics—RESET .................................................................................................................. 5-11
5.7 Switching Characteristics—XTI ........................................................................................................................ 5-11
5.8 Switching Characteristics—Internal Clock ........................................................................................................ 5-11
5.9 Switching Characteristics—Serial Control Port–SPI Slave Mode ..................................................................... 5-12
5.10 Switching Characteristics—Serial Control Port–SPI Master Mode ................................................................. 5-13
5.11 Switching Characteristics—Serial Control Port–I
2
C Slave Mode ................................................................... 5-13
5.12 Switching Characteristics—Serial Control Port–I
2
C Master Mode ................................................................. 5-14
5.13 Switching Characteristics—Digital Audio Slave Input Port ............................................................................. 5-15
5.14 Switching Characteristics—DSD Slave Input Port .......................................................................................... 5-15
5.15 Switching Characteristics—Digital Audio Output (DAO) Port ......................................................................... 5-16
6 Ordering Information ............................................................................................................................................... 6-18
7 Environmental, Manufacturing, and Handling Information ................................................................................. 7-18
8 Device Pinout Diagrams .......................................................................................................................................... 8-19
8.1 CS48520, 48-pin LQFP Pinout Diagram .......................................................................................................... 8-19
8.2 CS48540, 48-pin LQFP Pinout Diagram .......................................................................................................... 8-20
8.3 CS48560, 48-pin LQFP Pinout Diagram .......................................................................................................... 8-21
9 Package Mechanical Drawings ............................................................................................................................... 9-22
9.1 48-pin LQFP Package Drawing ........................................................................................................................ 9-22
10 Revision History .................................................................................................................................................. 10-23

CS48560-DQZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Audio DSPs IC HghPrfrmnc 32-bit Audio Decoder DSP
Lifecycle:
New from this manufacturer.
Delivery:
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