LTC2965
13
2965fb
For more information www.linear.com/LTC2965
Typical applicaTions
Negative Voltage Monitor with Output Level Shift
Figure 9 illustrates an LTC2965 configured to monitor a
–15V supply with a level-shifted output to a 5V supply. Q1
buffers the digital input of the 5V system from the –15V
supply and prevents UV from going below GND. The
OUT pin drives the base of Q1 through a resistor network
comprised of R3 and R4. Keep R4/R3 ≥0.4 to ensure
there is proper base current to pull UV to ground. If an
exposed pad is present it should be tied to the LTC2965
GND pin or left open.
Current Sink/Source
The LTC2965 can be used as a high voltage current source
or a current sink as shown in Figure 10. The current is
determined by placing a resistive load, R
SET
, on the REF
pin. The total current is then V
REF
/R
SET
+ I
VA
because the
bias current of the part adds a small error term. Part of
the bias current is the internal resistive divider which is
approximately 78MΩ with the RS pin configured to 10x.
Figure 9. Negative Voltage Monitor with Output Level Shift to a 5V Digital Input
Figure 10. LTC2965 Configured as High Voltage Current Source
V
IN
RSPS GND
LTC2965
REF
INH OUT
INL
R2
976k
–15V
2965 F09
R3
1M
UV
5V
DIGITAL
INPUT
Q1
MMBT2907
FAIRCHILD
R5
200k
R4
510k
R1
1.43M
RISING THRESHOLD
FALLING THRESHOLD
HYSTERESIS
RANGE SETTING
–15V MONITOR WITH LEVEL SHIFT
–14.5V
–14.2V
–0.3V
10X
V
IN
V
IN
GND
REF
I
SINK
= 1mA
I
ERROR
= (V
REF
/R
SET
) – I
SUPPLY
RS
INH OPEN
INL
R
SET
2.4k
OUT
PS
LTC2965
LOAD
Current Sink
I
SET
= V
REF
/R
SET
V
IN
V
IN
REF
I
SRC
= 1mA
2965 F10
INH
OPEN
INL
R
SET
2.4k
OUT
LOAD
Current Source
I
SET
= V
REF
/R
SET
LTC2965
GND
RS
PS
LTC2965
14
2965fb
For more information www.linear.com/LTC2965
Configure the current to be no greater than 1mA to ensure
that the REF voltage stays within ±1% tolerance. Current
values larger than 1mA exceed the REF buffers load
regulation capability and cause the REF voltage to drop
out of regulation.
Shunt Mode Hysteretic Regulator
Figure 11 shows the LTC2965 used as the controller for a
shunt mode hysteretic regulator to manage a battery-based
solar power system. When the battery voltage reaches a
Typical applicaTions
lower float limit of 13.7V Q1 turns off and the solar panel
current passes through to the battery and load. Once
the battery voltage rises to the upper charging limit of
14.7V, Q1 turns on shorting the solar panel to ground
with D1 isolating the battery from the shunt path. The
upper and lower thresholds are generated from the on-
chip reference as a separate external divider to set INH
and INL and scaled by 10x. The charging thresholds are
temperature compensated by an NTC thermistor over a
0°C to 50°C range.
LTC2965
15
2965fb
For more information www.linear.com/LTC2965
package DescripTion
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 0509 REV C
0.25 ±0.05
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1.65 ±0.05
(2 SIDES)2.10 ±0.05
0.50
BSC
0.70 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
Please refer to http://www.linear.com/product/LTC2965#packaging for the most recent package drawings.

LTC2965CMS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits 100V Single Micropower Voltage Monitor
Lifecycle:
New from this manufacturer.
Delivery:
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