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duty cycle should be checked for feasibility and margin
over the full V
IN
operating range. The minimum input volt-
age produces
the maximum duty cycle, which must not
exceed the LT8310’s minimum-specified maximum duty
cycle limit (75%). The maximum input voltage produces
the minimum duty cycle, which must be greater than duty
cycle of the minimum GATE pulse width, f
SW
t
ON(MIN)
,
as in Equation 14.
f
SW
t
ON(MIN)
<
V
OUT(TARG)
V
IN
N
P
N
S
< 0.75
[14]
Finally, the duty cycle scaling must be programmed. As
discussed in the latter part of the section, Duty Mode
Control, the voltage difference between the INTV
CC
and
RDVIN pins, V
SET
, and an accurate internal gain of 12V/V
sets the duty mode loop scaling constant, K
D
. The RDVIN
pin sinks a precise 20µA that permits a single resistor,
R
SET
, to program the voltage difference.
K
D
=
12V
V
V
SET
=
12V
V
(20µA R
SET
)
[15]
Resistor R
SET
may be chosen to achieve the desired
V
OUT(TARG)
based on Equation 16.
R
SET
=
V
OUT(TARG)
12V / V
N
P
N
S
20µA
[16]
The tolerance of the set resistor contributes directly to the
accuracy of the target output voltage, which is especially
important to the accuracy of converters operating without
output voltage feedback, so always use a 1% or better
resistor. Keep R
SET
close to the RDVIN and INTV
CC
pins of
the chip to minimize trace length and avoid cross-coupling
with other signals.
During soft-start, the RDVIN sinking current is reduced
to fold back the duty cycle while the clock frequency is
also reduced. This protects the transformer by limiting
the volt-seconds of flux generated when the clock period
is made longer. Take care to consider the flux conditions
during soft-start if external currents are employed for
trimming or margining.
Programming the Switching Frequency
The RT frequency adjust pin allows the user to program the
switching frequency from 100kHz to 500kHz to optimize
efficiency and performance or external component size.
Higher frequency operation yields smaller component
size, but increases switching losses and gate driving
current, and may not allow sufficiently high or low duty
cycle operation. It also decreases magnetization current,
which reduces the minimum load requirement under duty
cycle mode control. Lower frequency operation gives bet
-
ter performance at the cost of larger external component
size.
Table 1 shows the R
T
values for several frequencies
that match the design equation, Equation 17.
Table 1. Resistor Selection Guidance for Some Common
Switching Frequencies
FREQUENCY (f
SW
)
(kHz)
PERIOD (t
SW
)
(µs)
CLOSEST 1% RESISTOR (R
T
)
(kΩ)
100 10.0 100
150 6.67 66.5
200 5.00 49.9
250 4.00 40.2
300 3.33 33.2
350 2.86 28.7
400 2.50 24.9
450 2.22 22.1
500 2.00 20.0
R
T
=
1000kHz
f
SW
10k =
t
SW
1µs
10k
[17]
Minimize stray-coupling to the adjacent DFILT and SYNC
pins by keeping the traces short. An external resistor from
the RT pin to GND is requireddo not leave this pin open.
Programming the Current Sense
The LT8310 features primary-side switch current sensing
that protects the system from excessive load current, damps
output ringing when duty mode control dominates, and
sets the duty cycle when current mode control dominates.
When V
SENSE
exceeds 125mV (nom), the maximum switch
current threshold, the system shuts down and attempts
a restart after a slow wake-up period (see Programming
the Soft-Start Interval and Hiccup Period). In converter
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applications operating without output voltage feedback,
current sense information is fed back to the duty cycle loop
to reduce output voltage ringing due to load current steps
that excite the output LC tank. In supply applications, each
cycle ends when the amplified SENSE voltage exceeds the
V
C
pin control level. In all cases, during the cycle on-time,
the switch sees the rippling inductor current (I
L1
), scaled
by the transformer turns ratio (Equation 18) plus the
transformer’s primary magnetizing current, I
µ,p
. Applying
V
IN
across the magnetizing inductance generates a peak
magnetizing current of approximately 12 V
SET
t
SW
/L
µ,p
.
I
SWITCH
=
I
L1
N
P
/N
S
+I
µ,p
[18]
Resistor R
SENSE
connected between the SENSE and GND
pins converts the switch current to a voltage. It should be
selected to provide the maximum switch current required
by the application, including inductor ripple current, without
exceeding the SENSE pin’s overcurrent threshold. A good
rule of thumb is to allow 10% margin on the minimum
overcurrent threshold of 115mV.
During steady-state operation, the average inductor current
equals the load current. In applications under duty mode
control, which require a minimum load, less inductor ripple
means a lower minimum load current, so peak inductor
current might be 10% or less above the maximum load
current. Output voltage ring damping operates best with a
strong average current signal, so R
SENSE
should be chosen
as large as allowed by the SENSE pin threshold. Equation
19 provides a good value for R
SENSE
that accounts for the
minimum SENSE threshold:
R
SENSE
115mV
1.1 I
SWITCH(MAX)
[19]
In applications with output voltage feedback, current mode
control is most agile with a steep slope to the ripple, so
peak inductor current might be 20% or more above the
average load current. Equation 20 provides a good value for
R
SENSE
that accounts for the minimum SENSE threshold:
R
SENSE
115mV
1.4 I
SWITCH(MAX)
[20]
It is always prudent to verify the peak inductor current
in the application to ensure the sense resistor selection
provides margin to the SENSE overcurrent limit threshold.
The placement of R
SENSE
should be close to the source
of the N-channel MOSFET and GND of the LT8310. The
SENSE input to LT8310 should be a Kelvin connection to
the positive terminal of R
SENSE
. Verify the power in the
resistor to ensure that it does not exceed its rated maximum.
Programming the Soft-Start Interval and Hiccup
Period
The built-in soft-start circuit significantly reduces the inrush
current spike and output voltage overshoot at start-up.
Please refer to Figure 6 and the Timing Diagrams section
for the following discussion of soft-start behavior. The
soft-start interval is programmed by a capacitor connected
from the SS pin to GND. In a normal start-up, after the
INTV
CC
voltage exceeds its rising threshold of about
5.2V, the SS pin sources 50µA (typical), which ramps the
capacitor voltage. Switching commences when the 1.00V
switching threshold is exceeded (EN_GATE high).
Assuming the SS pin starts fully discharged, the soft-start
time, t
SS
, may be programmed by choosing C
SS
using
Equation 21. A 100nF soft-start capacitor produces about
2ms of delay, which suits many applications.
C
SS
= 50nF
t
SS
ms
[ ]
1ms
[21]
The SS pin voltage is discharged when the fault latch is
set under any of the following conditions: the UVLO pin
voltage falls below its threshold (SYS_UV high), the OVLO
pin voltage exceeds its threshold (SYS_OV high), the die
temperature exceeds 165°C (SYS_OT high), the INTV
CC
voltage falls below or rises above its operating range
(REG_UV or REG_OV high), or the SENSE pin voltage
exceeds its maximum threshold because the switch current
is too large (ISW_MAX high). When the fault condition
ceases and V
SS
< 0.27V, the fault latch clears, which brings
about restart as SS rises through the 1V threshold.
Exceeding maximum switch current sets the hiccup latch,
which extends the soft-start time by reducing the pull-up
current toA (typical). After the fault latch is reset, the
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slow wake-up time keeps the retry rate low during over-
current conditions
to reduce power dissipation. Hiccup
mode ends and the hiccup latch clears when V
SS
exceeds
1.00V, after which the pull-up current reverts to 50µA. For
practical purposes, the hiccup interval is approximately 8
times the soft-start time (Equation 22).
t
HICCUP
8 • t
SS
Compensating the Duty Mode Control Loop
In applications without output voltage feedback, little to
no output voltage ringing is the desired response; in cur
-
rent mode applications that have output voltage feedback
(isolated or not), this programming ensures controlled
operation if the output feedback fails.
For best results, the duty mode control loop compensation
should be programmed in relation to the LC tank resonance
of the output filter to best attenuate output voltage ringing
due to load current steps in duty mode control applications,
and to best provide the volt-second guardrail in supply
converters. The duty control transconductance, nominally
g
m(DFILT)
= 25µA/V, and the external compensation capaci-
tance, C
DFILT
, define the duty control loop time constant,
while the output inductance and capacitance, L1 and CL,
define the output resonance time constant.
τ
DFILT
=
C
DFILT
g
m(DFILT)
[23]
τ
LC
= L1C
L
[24]
The output ringing is decently damped when the loop time
constant is approximately twice the transformer ratio times
the LC resonance, as in Equation 25. For more damping
and a slower response, increase C
DFILT
, for less damping
and a faster response, decrease C
DFILT
.
C
DFILT
= 2
N
P
N
S
25
µA
V
L1C
L
[25]
In rare applications where a very fast duty loop response
is more advantageous than output voltage ring reduction
(e.g., sharp input voltage steps occur more regularly than
sharp load current steps), the compensation capacitor may
be chosen small for faster loop speed, independent of the
LC tank’s natural period.
8310 F06
ISW_MAX
SYS_UV
SS_LOW
+
50µA
3V
HICCUP
5µA
3V
C
SS
SS
8
EN_GATE
SYS UV
SYS OV
SYS OT
REG UV
REG OV
ISW MAX
QS
R
FAULT
LATCH
FAULT_RST
FAULT
0.25V
1V
+
QS
R
HICCUP
LATCH
Figure 6. Soft-Start Control Logic

LT8310EFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 100Vin For Conv Cntr
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