LT8310
7
8310f
For more information www.linear.com/LT8310
SENSE Overcurrent Threshold
Voltage vs Temperature
INTV
CC
Current Limit
vs Input Voltage
Typical perForMance characTerisTics
V
IN
Quiescent Current
vs Temperature
GATE Driver Transition Time
vs Capacitance
SOUT Driver Transition Time
vs Capacitance
FBX Regulation Voltage
vs Temperature
INTV
CC
Voltage vs Temperature
and Load Current
INTV
CC
Dropout Voltage
vs Load Current, Temperature
INTV
CC
Current Limit
vs Temperature
T
A
= 25°C, unless otherwise noted.
TEMPERATURE (°C)
–75 –50 –25 0 25 50 75 100 125 150
V
SENSE
(V)
125.0
127.5
8310 G10
122.5
120.0
175
130.0
0
2
–2
–4
4
ERROR (%)
T
A
, AMBIENT TEMPERATURE (°C)
–75
V
INTVCC
(V)
10.0
10.2
10.4
125
8310 G11
9.8
9.6
9.4
–50 –25 0
25 50
75 100 150
175
SHUTDOWN
AT T
J
≈ 165°C
LOAD = 1mA
LOAD = 10mA
LOAD = 20mA
INTV
CC
LOAD (mA)
0
0
DROPOUT VOLTAGE (V)
0.4
0.8
1.2
1.6
2.4
4
8 12 16
8310 G12
20 24
2.0
T
A
= 125°C
T
A
= –65°C
T
A
= 25°C
T
A
, AMBIENT TEMPERATURE (°C)
–75
–I
INTVCC
(mA)
32
34
36
125
8310 G14
30
28
26
–50 –25 0
25 50
75 100 150
175
V
IN
= 12V
T
J
≈ T
A
+ 15°C
TEMPERATURE (°C)
–75 –50 –25 0 25 50 75 100 125 150
POSITIVE V
FBX
(V)
1.600
1.616
8310 G15
1.584
1.568
175
POSITIVE
NEGATIVE
1.632
–0.800
–0.808
–0.792
–0.784
–0.816
NEGATIVE V
FBX
(V)
TEMPERATURE (°C)
–75
I
VIN
(mA)
4.4
4.5
4.6
150125
8310 G16
4.3
4.2
4.0
–25
25
75
–50 175
0
50
100
4.1
4.8
4.7
GATE, SOUT PINS
NOT SWITCHING
V
IN
(V)
0
20
–I
INTVCC
(mA)
25
30
35
40
45
50
20 40 60 80
8310 G13
100
INSTANTANEOUS
FROM OFF,
T
A
= T
C
= 25°C
THERMALLY
SETTLED,
T
A
= 25°C
C
GATE
(nF)
0
TIME (ns)
60
80
100
20
8310 G17
40
20
50
70
90
30
10
0
5
10
15
25
t
RISE
V
IN
= 48V
f
SW
= 100kHz
t
FALL
C
SOUT
(nF)
0
TIME (ns)
60
80
100
6.0
8310 G18
40
20
50
70
90
30
10
0
1.5
3.0
4.5
7.5
t
FALL
V
IN
= 48V
f
SW
= 100kHz
t
RISE
LT8310
8
8310f
For more information www.linear.com/LT8310
T
A
= 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Driver Nonoverlap Delays
vs Temperature Set Current vs Soft-Start Voltage
Switching Frequency (Normalized)
vs Soft-Start Voltage
GATE Duty Cycle (Normalized)
vs Soft-Start Voltage
Output Voltage Transient
Response (Typical Applications,
Pages 1 and 31)
TEMPERATURE (°C)
–75
t
DLY
(ns)
150
200
250
300
125
100
50
125
175
225
275
75
25
0
–25
25
75
–50 150
0
50
100
175
SOUT FALL TO GATE RISE
GATE FALL TO SOUT RISE
V
SS
(V)
0
0
I
RDVIN
(µA)
5
10
15
20
25
0.5
1.0 1.5 2.0
8310 G20
2.5 3.0
V
SS
(V)
0
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
1.5 2.5
8310 G21
0.5 1.0
2.0 3.0
f
SW
/f
SW(NOM)
(kHz/kHz)
V
SS
(V)
0
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
1.5 2.5
8310 G22
0.5 1.0
2.0 3.0
DUTY/DUTY (NORM) (%/%)
100kHz
300kHz
500kHz
1ms/DIV
8310 G23
V
IN
= 48V
I
OUT
= 4.5A TO 6.5A TO 4.5A
V
OUT
1V/DIV
LT8310
9
8310f
For more information www.linear.com/LT8310
pin FuncTions
UVLO (Pin 1): System Undervoltage Lockout Input.
Program the system falling UVLO threshold (minimum
V
IN
voltage) with a resistive voltage divider from V
IN
to
this pin. The pin voltage is compared internally to an ac-
curate 1.22V threshold
.
Program the system rising UVLO
hysteresis via this pin’s 5.7µA hysteretic current and the
values of the external resistors. The device is shut down
below the UVLO threshold and drawsA or less from V
IN
when V
UVLO
≤ 0.36V (min). The UVLO pin can withstand
100V maximum.
OVLO (Pin 3): System Overvoltage Lockout Input. Program
the system rising OVLO threshold (maximum V
IN
voltage)
with a resistive voltage divider from V
IN
to this pin. The
pin voltage is compared internally to an accurate 1.25V
threshold. Exceeding the OVLO threshold sets the fault
latch and forces a system shutdown.
DFILT (Pin 5): Duty Cycle Loop Filter Pin. Set the duty
cycle loop filter pole by connecting a capacitor to GND
from this pin in both duty mode and current mode ap
-
plications. Consult
the Applications Information section
to choose the capacitor value to reduce load step ringing
in duty mode control applications. Do not float this pin, a
capacitor is required.
RT (Pin
6): Switching Period Set Input. Set the oscillator
switching period (frequency) via a resistor to GND from
this pin, typically 20k to 100k fors to 10µs (500kHz to
100kHz). In applications where an external clock drives the
SYNC pin, program the switching period to the expected
SYNC frequency value. Place the resistor close to the pin
and minimize stray capacitance. Do not leave the RT pin
open.
SYNC (Pin 7): External Clock Input. Drive this pin with
an external fixed-frequency clock signal to synchronize
switching to it. The SYNC falling edge is automatically
detected and converted to a pulse that starts the minimum
off-time of the duty cycle. The SYNC pulse low and highs
times must both be ≥250ns. Select an R
T
resistor that
programs the internal switch frequency to the external
SYNC frequency to keep the maximum duty cycle limit
accurate. When V
SS
< 1V, the SYNC pin is ignored.
SS (Pin 8): Soft-Start Input. Program start and hiccup
timing by tying an external capacitor between SS and GND.
During normal soft-start this pin sources 50µA. During
faults and initial start, a 6mA (typ) current sink discharges
this pin to 0.27V (typ). The
GATE pin is shut off until V
SS
≥ 1V. After an overcurrent shutdown, the pin sources only
5µA until V
SS
≥ 1V, which provides an extended wake-up
period that reduces power dissipation during repeated
start-up retries (hiccup mode). Switching frequency and
duty cycle are folded back until SS > 2.5V. Above 1V, the
pin sources 50µA until charged to an internal 3V clamp.
V
C
(Pin 9): Transconductance Error Amp Output. Compen-
sate the converter loop at this pin with an external series
resistor
and capacitor to GND in feedback applications.
In opto-isolated feedback applications, compensation is
generally done on the secondary side (see the Applica
-
tions Information
section). In duty mode control applica-
tions that have no output voltage feedback, leave this pin
unconnected.
FBX
(Pin 10): Feedback Input and Mode Control. Standard
input for nonisolated applications that require voltage
feedback. Program output voltage with a resistive voltage
divider to compare to the internal 1.6V reference for positive
output applications, or to the –0.8V reference for negative
output applications. When –0.2V < V
FBX
< 0.3V, duty mode
controls the GATE pin, otherwise FBX is assumed to be
in control. FBX exceeding its reference by 7.5% ends the
switching cycle in progress
without triggering a system
reset. Tie FBX to GND if duty mode only is desired.
SOUT (Pin 11): Synchronization Output. Pulse transformer
driver for applications with synchronous secondary-side
control, complementary to GATE. The SOUT falling edge
leads GATE turn-on by 240ns (typ), and the rising edge
trails GATE turn off by 12ns (typ). Actively pulled to INTV
CC
during shutdown.
NC (Pin 12): No Internal Connection. Connect to GND.

LT8310EFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 100Vin For Conv Cntr
Lifecycle:
New from this manufacturer.
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