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93V855AGLFT
P1-P3
P4-P6
P7-P9
7
ICS93
V855I
0783C—06/01/04
(N is a large number of samples)
t
(
) n+1
t
()
n
t
()
=
1
n=N
t
()
n
N
CLK_INC
CLK_INT
FB_INC
FB_INT
t
(skew)
Y
#
X
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Y
X
Parameter
Measurement
Information
Figure
4. Static
Phase
Offset
Figure
5. Output
Skew
1
f
O
t
=
t
-
(jit_per)
t
c(n)
C(n)
1
f
O
Fi
g
ure
6. Period Jitter
8
ICS93
V855I
0783C—06/01/04
Clock
Inputs
and
Outputs
80%
20%
80%
20%
t
slr
t
slf
V
ID
,V
OD
Figure
8. Input
and
Output
Slew
Rates
Parameter
Measurement
Information
t
jit(hper_n)
t
jit(hper_n+1)
1
f
o
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Figure
7. Half-Period
Jitter
t
jit(hper)
t
jit(hper_n)
1
2xf
O
=-
9
ICS93
V855I
0783C—06/01/04
4.40 mm. Body
, 0.65 mm. pitch TSSOP
(173 mil)
(0.0256 Inch)
MI
N
MA
X
MIN
MAX
A
-
-
1.
20
--
.
047
A
1
0.
05
0.15
.
002
.
006
A
2
0.
80
1.05
.
032
.
041
b
0.
19
0.
30
.
007
.
012
c
0.
09
0.
20
.
0035
.
008
D
E
E
1
4.
30
4.50
.
169
.
177
e
L
0.
45
0.
75
.
018
.
030
N
a0
°
8
°
0
°
8
°
aaa
--
0.10
--
.
004
VAR
IA
TIO
NS
MI
N
MA
X
MIN
MAX
28
9.
60
9.
80
.
378
.
386
10-
00
35
SYMBO
L
I
n M
i
ll
i
m
et
ers
I
n I
nc
hes
COM
M
O
N DI
M
E
NS
I
ONS
COM
M
O
N DI
M
E
N
S
I
O
NS
SEE VAR
IATION
S
SEE VAR
I
ATIO
NS
6.
40 B
A
S
I
C
0.
252
BASIC
0.
65 B
A
S
I
C
0.
0256
BASI
C
SEE VAR
IATION
S
SEE VAR
I
ATIO
NS
N
D mm
.
D (inc
h)
Refe
r
enc
e D
oc
.: J
EDEC Publi
c
ation 95
, MO
-
153
INDEX
AREA
INDEX
AREA
12
1
2
N
D
E1
E
α
SEATING
PLANE
SEATING
PLANE
A1
A
A2
e
-C-
- C -
b
c
L
aaa
C
Ordering Information
93V855yGILF-T
Example:
Designation for tape and reel packaging
Lead Free (Optional)
P
ackage T
ype
G =
TSSOP
Revision Designator
(will not correlate with datasheet revision)
Device T
ype
XXXX
y
G LF-
T
P1-P3
P4-P6
P7-P9
93V855AGLFT
Mfr. #:
Buy 93V855AGLFT
Manufacturer:
IDT
Description:
Clock Drivers & Distribution DDR CLOCK DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
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93V855AGLFT
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