MAX9210/MAX9214/MAX9220/MAX9222
Programmable DC-Balance
21-Bit Deserializers
4 _______________________________________________________________________________________
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
and V
TL
.
Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25°C.
Note 3: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma.
Note 4: C
L
includes probe and test jig capacitance.
Note 5: RCIP is the period of RxCLK IN. RCOP is the period of RxCLK OUT. RCIP = RCOP.
Note 6: RSKM measured with
150ps cycle-to-cycle jitter on RxCLK IN.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= V
CCO
= +3.0V to +3.6V, 100mV
P-P
at 200kHz supply noise, C
L
= 8pF, PWRDWN = high, DCB/NC = high or low, differential
input voltage |V
ID
| = 0.1V to 1.2V, Input Common Mode Voltage V
CM
= |V
ID
/2| to 2.4V - |V
ID
/2|, T
A
= -40°C to +85°C, unless otherwise
noted. Typical values are at V
CC
= V
CCO
= +3.3V, |V
ID
| = 0.2V, V
CM
= 1.25V, T
A
= 25°C). (Notes 3, 4, 5)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RxOUT_ 3.52 5.04 6.24
MAX9210/
MAX9220
RxCLK OUT 2.2 3.15 3.9
Output Rise Time CLHT
0.1V
CCO
to
0.9V
CCO
,
Figure 3
MAX9214/MAX9222 2.2 3.15 3.9
ns
RxOUT_ 1.95 3.18 4.35
MAX9210/
MAX9220
RxCLK OUT 1.3 2.12 2.9
Output Fall Time CHLT
0.9V
CCO
to
0.1V
CCO
,
Figure 3
MAX9214/MAX9222 1.3 2.12 2.9
ns
8MHz 6600 7044
16MHz 2560 3137
34MHz 900 1327
DC-balanced mode,
Figure 4 (Note 6)
66MHz 330 685
10MHz 6600 7044
20MHz 2500 3300
40MHz 960 1448
RxIN Skew Margin RSKM
Non-DC-balanced mode,
Figure 4 (Note 6)
85MHz 330 685
ps
RxCLK OUT High Time RCOH Figures 5a, 5b
0.35 x
RCOP
ns
RxCLK OUT Low Time RCOL Figures 5a, 5b
0.35 x
RCOP
ns
RxOUT Setup to RxCLK OUT RSRC Figures 5a, 5b
0.30 x
RCOP
ns
RxOUT Hold from RxCLK OUT RHRC Figures 5a, 5b
0.45 x
RCOP
ns
RxCLK IN to RxCLK OUT Delay RCCD Figures 6a, 6b 4.9 6.17 8.1 ns
Deserializer Phase-Locked Loop
Set
RPLLS Figure 7
32800
x RCIP
ns
Deserializer Power-Down Delay RPDD Figure 8 100 ns
MAX9210/MAX9214/MAX9220/MAX9222
Programmable DC-Balance
21-Bit Deserializers
_______________________________________________________________________________________ 5
WORST-CASE PATTERN AND PRBS
SUPPLY CURRENT vs. FREQUENCY
MAX9210 toc01
20
30
50
40
80
90
70
60
100
SUPPLY CURRENT (mA)
5152010
25
30 35 40
FREQUENCY (MHz)
MAX9220
DC-BALANCED MODE
WORST-CASE PATTERN
2
7
- 1 PRBS
WORST-CASE PATTERN AND PRBS
SUPPLY CURRENT vs. FREQUENCY
MAX9210 toc02
20
30
50
40
80
90
70
60
100
SUPPLY CURRENT (mA)
5152010
25
30 35 40
FREQUENCY (MHz)
MAX9220
NON-DC-BALANCED MODE
WORST-CASE PATTERN
2
7
- 1 PRBS
WORST-CASE PATTERN SUPPLY CURRENT
vs. FREQUENCY
MAX9210 toc03
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
65503520
60
80
100
120
140
160
40
580
MAX9214
DC-BALANCED MODE
WORST-CASE PATTERN SUPPLY CURRENT
vs. FREQUENCY
MAX9210 toc04
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
75 9060
30
45
60
80
100
120
160
40
15
140
MAX9214
NON-DC-BALANCED MODE
OUTPUT TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
CCO
)
MAX9210 toc05
OUTPUT SUPPLY VOLTAGE (V)
OUTPUT TRANSITION TIME (ns)
4.54.03.53.0
2
3
4
5
1
2.5 5.0
MAX9214
t
F
t
R
OUTPUT TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
CCO
)
MAX9210 toc06
OUTPUT SUPPLY VOLTAGE (V)
OUTPUT TRANSITION TIME (ns)
4.54.03.53.0
2
3
4
5
7
6
1
2.5 5.0
t
F
t
R
MAX9220
Typical Operating Characteristics
(V
CC
= V
CCO
= +3.3V, C
L
= 8pF, PWRDWN = high, differential input voltage V
ID
= 0.2V, input common-mode voltage V
CM
= 1.2V,
T
A
= +25°C, unless otherwise noted.)
MAX9210/MAX9214/MAX9220/MAX9222
Programmable DC-Balance
21-Bit Deserializers
6 _______________________________________________________________________________________
Pin Description
PIN
TSSOP
NAME FUNCTION
1, 2, 4, 5, 45, 46, 47
RxOUT14–
RxOUT20
Channel 2 Single-Ended Outputs
3, 25, 32, 38, 44 GND Ground
6 DCB/NC
LVTTL/LVCMOS DC-Balance Programming Input:
MAX9210: pulled up to V
CC
MAX9214: pulled up to V
CC
MAX9220: pulled up to V
CC
MAX9222: pulled up to V
CC
See Table 1.
7, 13, 18 LVDS GND LVDS Ground
8 RxIN0- Inverting Channel 0 LVDS Serial Data Input
9 RxIN0+ Noninverting Channel 0 LVDS Serial Data Input
10 RxIN1- Inverting Channel 1 LVDS Serial Data Input
11 RxIN1+ Noninverting Channel 1 LVDS Serial Data Input
12 LVDS V
CC
LVDS Supply Voltage
14 RxIN2- Inverting Channel 2 LVDS Serial Data Input
15 RxIN2+ Noninverting Channel 2 LVDS Serial Data Input
16 RxCLK IN- Inverting LVDS Parallel Rate Clock Input
17 RxCLK IN+ Noninverting LVDS Parallel Rate Clock Input
19, 21 PLL GND PLL Ground
20 PLL V
CC
PLL Supply Voltage
22 PWRDWN
5V Tolerant LVTTL/LVCMOS Power-Down Input. Internally pulled down to GND. Outputs
are high impedance when PWRDWN = low or open.
23 RxCLK OUT
Parallel Rate Clock Single-Ended Output. MAX9210/MAX9214, rising edge strobe.
MAX9220/MAX9222, falling edge strobe.
24, 26, 27, 29, 30, 31,
33
RxOUT0–
RxOUT6
Channel 0 Single-Ended Outputs
28, 36, 48 V
CCO
Output Supply Voltage
34, 35, 37, 39, 40, 41,
43
RxOUT7–
RxOUT13
Channel 1 Single-Ended Outputs
42 V
CC
Digital Supply Voltage

MAX9220EUM+TD

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Serializers & Deserializers - Serdes DC-Balanced Deserialize
Lifecycle:
New from this manufacturer.
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