www.ams.com/LED-Driver-ICs/AS1105 Revision 1.36 6 - 15
AS1105
Datasheet - Detailed Description
8 Detailed Description
8.1 Serial-Addressing Modes
The programming of the AS1105 is done via the 4-wire serial interface. A programming sequence consists of 16-bit packages. The data is shifted
into the internal 16-Bit register with the rising edge of the CLK signal. With the rising edge of the LOAD signal, the data is latched into a digital or
control register depending on the address. The LOAD signal must go to high after the 16th rising clock edge. The LOAD signal can also come
later but just before the next rising edge of CLK, otherwise data would be lost. The content of the internal shift register is applied 16.5 clock
cycles later to the DOUT pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bit-programming package are described in
Table 4. The first 4 Bits D15-D12 are ”don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most
significant bit (MSB). The exact timing is given in Figure 5.
Figure 5. Timing Diagram
8.2 Digit and Control Registers
The AS1105 incorporates 12 registers, which are listed in Table 5. The digit and control registers are selected via the 4Bit address word. The 4
digit registers are realized with a 32bit memory. Each digit can be controlled directly without rewriting the whole contents. The control registers
consist of decode mode, display intensity, number of scanned digits, shutdown, display test and reset/external clock register.
8.3 Shutdown Mode
The AS1105 features a shutdown mode, where it consumes only 20µA current. The shutdown mode is entered via a write to register 0Ch. Then
all segment current sources are pulled to ground and all digit drivers are connected to V
DD, so that nothing is displayed. All internal digit
registers keep the programmed values. The shutdown mode can either be used for power saving or for generating a flashing display by
repeatedly entering and leaving the shutdown mode. The AS1105 needs typically 250µs to exit the shutdown mode. During shutdown, the
AS1105 is fully programmable. Only the display test function overrides the shutdown mode.
Table 4. Serial Data Format (16 Bits)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X X X X Address MSB Data LSB
D0
D1
D15
D14
DOUT
DIN
CLK
LOAD
t
CSW
t
CL
t
C
t
C
t
C
t
LDCK
t
DO
t
D
t
D
www.ams.com/LED-Driver-ICs/AS1105 Revision 1.36 7 - 15
AS1105
Datasheet - Detailed Description
8.4 Initial Power-up
After powering up the system, all register are reset, so that the display is blank. The AS1105 starts the shutdown mode. All registers should be
programmed for normal operation. The default settings enable only scan of one digit, the internal decoder is disabled, data register and intensity
register are set to the minimum value.
8.5 Decode-Mode Register
In the AS1105, a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-
9, E,H, L,P and -. In register 09h, a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low), the
data Bits D7-D0 correspond to the segment lines of the AS1105. In
Table 7 some possible settings for register 09h are shown. Bit D7, which
corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In Table 8
the font of the Code B decoder is shown. In Table 10 the correspondence of the register to the appropriate segments of a 7 segment display is
shown (see Figure 6).
8.6 Intensity Control and Interdigit Blanking
Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current, which flows between VDD
and I
SET
, defines the current that flows through the LEDs. The LED current is 100 times the I
SET
current. The minimum value of RSET should be
9.53k
Ω, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The
brightness can be programmed in 16 steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display.
8.7 Scan-Limit Register
The scan limit register 0Bh selects the number of digits displayed. When all 4 digits are displayed the update frequency is typically 800Hz. If the
number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the
number of digits. Since the number of displayed digits influences the brightness, the resistor R
SET should be adjusted accordingly. Table 12
shows the maximum allowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be
used to blank portions of the display (leading zeros).
Table 5. Register Address Map
Register
Register
Hex Code
D15-D12 D11 D10 D9 D8
No-Op X 0 0 0 0 0xX0
Digit 0 X 0 0 0 1 0xX1
Digit 1 X 0 0 1 0 0xX2
Digit 2 X 0 0 1 1 0xX3
Digit 3 X 0 1 0 0 0xX4
Decode Mode X 1 0 0 1 0xX9
Intensity X 1 0 1 0 0xXA
Scan Limit X 1 0 1 1 0xXB
Shutdown X 1 1 0 0 0xXC
Not used X 1 1 0 1 0xXD
Reset and ext. Clock X 1 1 1 0 0xXE
Display Test X 1 1 1 1 0xXF
www.ams.com/LED-Driver-ICs/AS1105 Revision 1.36 8 - 15
AS1105
Datasheet - Detailed Description
Note: In the above table, the decimal point (DP) is set by bit D7 = 1
Table 6. Shutdown Register Format (address (hex) = 0xXC)
Mode
Address Code
(Hex)
Register Data
D7 D6 D5 D4 D3 D2 D1 D0
Shutdown Mode 0xXC X X X X X X X 0
Normal Operation 0xXC X X X X X X X 1
Table 7. Decode-mode Register Examples (address (hex) = 0xX9)
Decode Mode
Register Data
Hex Code
D7 D6 D5 D4 D3 D2 D1 D0
No decode for digits 4–0 0 0 0 0 0 0 0 0 0x00
Code B decode for digit 0
No decode for digits 4–1
0 0 0 0 0 0 0 1 0x01
Code B decode for digits 3–0 0 0 0 0 1 1 1 1 0x0F
Code B decode for digits 4–0 1 1 1 1 1 1 1 1 0xFF
Table 8. Code B Font
7-Segment
Character
Register Data On Segments = 1
D7 D6-D4 D3 D2 D1 D0 DP A B C D E F G
0X00001111110
1X00010110000
2X00101101101
3X00111111001
4X01000110011
5X01011011011
6X01101011111
7X01111110000
8X10001111111
9X10011111011
-- X 1 0 1 0 0 0 0 0 0 0 1
EX10111001111
HX11000110111
LX11010001110
PX11101100111
blank X 1 1 1 1 0 0 0 0 0 0 0
Table 9. No-decode Mode Data Bits and Corresponding Segment Lines
Register Data
D7 D6 D5 D4 D3 D2 D1 D0
Corresponding Segment Line DP A B C D E F G

AS1105WL-T

Mfr. #:
Manufacturer:
ams
Description:
LED Display Drivers AS1105WL-T SOIC20 LF T&R
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet