MAX1426
10-Bit, 10Msps ADC
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ELECTRICAL CHARACTERISTICS (continued)
(V
AV
DD
= V
CMLP
= +5V, V
DV
DD
= +3.3V, V
CMLN
= V
AGND
= V
DGND
= 0V, internal reference, digital output loading 35pF, f
CLK
=
10MHz (50% duty cycle), T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 1: Internal reference, REFIN bypassed to AGND with a 0.1µF capacitor.
Note 2: External +2.5V reference applied to REFIN.
Note 3: Internal reference disabled. V
REFIN
= 0, V
REFP
= 3.25V, V
CML
= 2.25V, and V
REFN
= 1.25V.
Note 4: Measured as the ratio of the change in midscale offset voltage for a ±5% change in V
AV
DD
using the internal reference.
Note 5: IMD is measured with respect to either of the fundamental tones.
Note 6: Specifies the common-mode range of the differential input signal supplied to the MAX1426.
Note 7: Defined as the input frequency at which the fundamental component of the output spectrum is attenuated by 3dB.
Note 8: V
REFIN
is internally biased to +2.5V through a 5kΩ resistor.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
10 20 ns
ns10 20
Bus Enable
Bus Disable
Data Output Delay ns52025t
OD
Aperture Jitter ps7t
AJ
Aperture Delay ns5t
AD
Pipeline Delay (Latency) cycles5.5
Clock Low ns40 50 60Figure 4t
CL
Clock High ns40 50 60Figure 4t
CH
Clock Frequency MHz10f
CLK
Conversion Rate MHz0.1 10CONV
TIMING CHARACTERISTICS
