MAX1426
10-Bit, 10Msps ADC
_______________________________________________________________________________________ 9
Pin Description
Common-Mode Level Positive Input. For AC applications, connect to AV
DD
to internally set the input
DC bias level. For DC-coupled applications, connect to AGND.
CMLP11
Common-Mode Level Negative Input. Connect to AGND to internally set the input DC bias level for
both AC- and DC-coupled applications.
CMLN12
Clock Input. Clock frequency range from 0.1MHz to 10MHz.CLK13
Active-Low Output Enable and Power-Down Input. Digital outputs become high impedance and
device enters low-power mode when pin is high.
OE/PD
14
Digital Data Output (MSB)D915
Negative Reference Output. Bypass to AGND with 0.1µF capacitor. REFN can accept an external
voltage when the internal reference is disabled (REFN = AGND).
REFN5
Common-Mode Level Input. Bypass to AGND with a 0.1µF capacitor. CML can accept an external
voltage when the internal reference is disabled (REFN = AGND).
CML6
Positive Analog Signal InputINP9
Negative Analog Signal InputINN10
External Reference Input. Bypass to AGND with a 0.1µF capacitor. REFIN can be biased externally
to adjust the reference level and calibrate full-scale errors. To disable the internal reference, connect
REFIN to AGND.
REFIN4
Positive Reference Output. Bypass to AGND with a 0.1µF capacitor. If the internal reference is
disabled, REFP can accept an external voltage.
REFP3
PIN
Analog Supply Voltage Input. Bypass with a parallel combination of 2.2µF, 0.1µF, and 100pF capacitors
to AGND. Bypass each supply input to the closest AGND (e.g., capacitors between pins 1 and 2).
AV
DD
2, 8
Analog Ground. Connect all return paths for analog signals to these pins.AGND1, 7
FUNCTIONNAME
Digital Data Outputs 4–1D4–D124–27
Digital Data Output (LSB)D028
Digital Supply Voltage Input. Bypass with 2.2µF and 0.1µF capacitors in parallel. Digital supply can
operate with voltages as low as +2.7V.
DV
DD
20, 22
Digital GroundDGND21, 23
Digital Data Outputs 8–5D8–D516–19
