List of figures STA8088FG
4/17 Doc ID 022731 Rev 3
List of figures
Figure 1. STA8088FG system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. VFQFPN56 connection diagram - with CAN (bottom view) . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. VFQFPN56 connection diagram - no CAN (bottom view). . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. VFQFPN56 7 x 7 x 0.85 mm package dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 5. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
STA8088FG Overview
Doc ID 022731 Rev 3 5/17
1 Overview
STA8088FG is a highly integrated System-On-Chip device designed for positioning systems
applications.
The low power consumption and minimum BOM make STA8088FG the ideal solution for
low-cost and battery-operated portable products such handheld, computers, cameras, data
loggers and sports accessories, as well as automotive application.
It combines a high performance ARM946 microprocessor with embedded enhanced
peripherals and I/O capabilities with ST next generation triple-constellation positioning
engine. The RF front-end and base band processor are able to support GPS/Galileo and
Glonass navigation systems. The device is offered with a complete firmware which performs
all positioning operations including tracking, acquisition, navigation and data output with no
need of external memories.
It also provides clock generation via PLL, backup logic with real time clock and it supports
USB2.0 standard at full speed, (12 Mbps) with on-chip PHY.
STA8088FG is software compatible with the ARM processor family. The device is power
supplied with 1.8V and uses three on-chip voltage regulators to internally supply the RF
front-end, core logic and the backup logic. In order to reduce the power consumption the
chip can be directly powered with 1.2 V bypassing the embedded voltage regulators which
will be put in power down mode.
I/O lines are compatible with 1.8 V and 3.3 V.
The chip, using STMicroelectronics CMOSRF Technology, is housed in a VFQFPN-56
(7 x 7 x 0.85 mm) package with stacked 16 Mbit Flash memory.
Pin description STA8088FG
6/17 Doc ID 022731 Rev 3
2 Pin description
2.1 Block diagram
Figure 1. STA8088FG system block diagram
BK_domain
SQI
IF
USB
IF
VIC
ROM
16KB
AHB
DCREG
OSCI32
THSENS
SARADC
AD10SA1M_18
OSCI32
OSCI32_LJ_1V8
PWR, RST & CLK
CTRL
ISO
CELL
I2CSSP
UART2
Rx - Tx
REGMAP
APB
Bridge2
UART1
Rx - Tx
UART
Rx-Tx
ADCMTUGPIOEFTWD
APB
ARM 946
I-Cache
16KB
D-Cache
8KB
HIGH SPEED I - TCM
64KB
64KHIGH SPEED D – TCM 8
APB
Bridge1
SYS CTRL
RTC
APB
RAM 8KB
G3 Base Band
Glonass IF
GALGPS IF
2 Fast Acq
Channel
32 Trk
Channels
Mux
Acq
RAMs
APB
Bridge
DC_LN_1V8TO1V2
HPREG LPREG
BKREG
CLOCK_GEN
CKX2
PLL
PG_650x
FRC_DPLL
RIOSC47
Te st controller
IOs
JTAG
G3RF IP
1.8V 1.2V
DCREG
SPI IF
OSCI
26MHz
RF
Section
LNA
Section
ADC
GALGPS
ADC
GLONASS
I/D SWITCHABLE TCM
8x16KB
GAPGCFT00542
CAN1
CAN0

STA8088FG

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
RF Receiver Fully Integrated GPS/Galileo/Glonass/QZSS Receiver with embedded RF and in-package Flash
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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