LT8705
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Typical perForMance characTerisTics
Load Step (Figure 14) Load Step (Figure 14)
Load Step (Figure 14)
Line Transient (Figure 14) Line Transient (Figure 14)
Burst Mode Operation (Figure 14) Burst Mode Operation (Figure 14)
V
OUT
100mV/DIV
I
L
1A/DIV
2ms/DIVV
IN
= 36V
V
OUT
= 48V
8705 G27
V
OUT
100mV/DIV
I
L
5A/DIV
5ms/DIVV
IN
= 72V
V
OUT
= 48V
8705 G28
V
OUT
500mV/DIV
I
L
2A/DIV
500µs/DIVV
IN
= 36V
V
OUT
= 48V
LOAD STEP = 1A TO 3A
8705 G29
V
OUT
500mV/DIV
I
L
2A/DIV
500µs/DIVV
IN
= 48V
V
OUT
= 48V
LOAD STEP = 1A TO 3A
8705 G30
V
OUT
500mV/DIV
I
L
2A/DIV
500µs/DIVV
IN
= 72V
V
OUT
= 48V
LOAD STEP = 1A TO 3A
8705 G31
V
OUT
0.5V/DIV
V
C
0.5V/DIV
V
IN
36V TO 72V
I
L
2A/DIV
2ms/DIV
8705 G32
V
OUT
0.5V/DIV
V
C
0.5V/DIV
V
IN
72V TO 36V
I
L
2A/DIV
2ms/DIV
8705 G33
T
A
= 25°C unless otherwise specified.
LT8705
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pin FuncTions
SHDN (Pin 1/Pin 4): Shutdown Pin. Tie high to enable
device. Ground to shut down and reduce quiescent current
to a minimum. Do not float this pin.
CSN (Pin 2/Pin 5): The (–) Input to the Inductor Current
Sense and Reverse-Current Detect Amplifier.
CSP (Pin 3/Pin 6): The (+) Input to the Inductor Current
Sense and Reverse-Current Detect Amplifier. The V
C
pin
voltage and built-in offsets between CSP and CSN pins, in
conjunction with the R
SENSE
resistor value, set the current
trip threshold.
LDO33 (Pin 4/Pin 7): 3.3V Regulator Output. Bypass this
pin to ground with a minimum 0.1μF ceramic capacitor.
FBIN (Pin 5/Pin 8): Input Feedback Pin. This pin is con
-
nected to the input error amplifier input.
FBOUT
(
Pin 6/Pin 9): Output Feedback Pin. This pin
connects the error amplifier input to an external resistor
divider from the output.
IMON_OUT (Pin 7/Pin 10): Output Current Monitor Pin. The
current out of this pin is proportional to the output current.
See the Operation and Applications Information sections.
V
C
(Pin 8/Pin 11): Error Amplifier Output Pin. Tie external
compensation network to this pin.
SS (Pin 9/Pin 12): Soft-Start Pin. Place at least 100nF of
capacitance here. Upon start
-up, this pin will be charged
by an internal resistor to 2.5V.
CLKOUT (Pin 10/Pin 13): Clock Output Pin. Use this
pin to synchronize one or more compatible switching
regulator ICs to the LT8705. CLKOUT toggles at the same
frequency as the internal oscillator or as the SYNC pin,
but is approximately 180° out of phase. CLKOUT may also
be used as a temperature monitor since the CLKOUT duty
cycle varies linearly with the part’s junction temperature.
The CLKOUT pin can drive capacitive loads up to 200pF.
SYNC (Pin 11/Pin 14): To synchronize the switching fre
-
quency to
an outside clock, simply drive this pin with a
clock.
The high voltage level of the clock needs to exceed
1.3V, and the low level should be less than 0.5V. Drive this
pin to less than 0.5V to revert to the internal free-running
clock. See the Applications Information section for more
information.
(QFN/TSSOP)
RT (Pin 12/Pin 15): Timing Resistor Pin. Adjusts the switch-
ing frequency.
Place a resistor from this pin to ground to
set the free-running frequency. Do not float this pin.
BG1, BG2 (Pins 14, 16/Pins 17, 19): Bottom Gate Drive.
Drives the gates of the bottom N-channel
MOSFETs between
ground and GATEV
CC
.
GATEV
CC
(Pin 15/Pin 18): Power Supply for Gate Drivers.
Must be connected to the INTV
CC
pin. Do not power from
any other supply. Locally bypass to GND.
BOOST1, BOOST2 (Pins 23, 17/Pins 28, 20): Boosted
Floating Driver Supply. The (+) terminal of the bootstrap
capacitor connects here. The BOOST1 pin swings from a
diode voltage below GATEV
CC
up to V
IN
+ GATEV
CC
. The
BOOST2 pin swings from a diode voltage below GATEV
CC
up to V
OUT
+ GATEV
CC
TG1, TG2 (Pins 22, 18/Pins 26, 21): Top Gate Drive. Drives
the top N-channel MOSFETs with voltage swings equal
to GATEV
CC
superimposed on the switch node voltages.
SW1, SW2 (Pins 21, 19/Pins 24, 22): Switch Nodes. The
(–) terminals of the bootstrap capacitors connect here.
SRVO_FBIN (Pin 25 QFN Only): Open-Drain Logic Out
-
put. This pin is pulled to ground when the input voltage
feedback loop is active.
SRVO_IIN
(Pin 26 QFN Only): Open-Drain Logic Output.
The pin is pulled to ground when the input current loop
is active.
SRVO_IOUT (Pin 27 QFN Only): Open-Drain Logic Out
-
put. The pin is pulled to ground when the output current
feedback loop is active.
SRVO_FBOUT (Pin 28 QFN Only): Open-Drain
Logic Out-
put. This pin is pulled to ground when the output voltage
feedback loop is active.
EXTV
CC
(Pin 29/Pin 30): External V
CC
Input. When EXTV
CC
exceeds 6.4V (typical), INTV
CC
will be powered from this
pin. When EXTV
CC
is lower than 6.22V (typical), INTV
CC
will be powered from V
IN
.
CSNOUT (Pin 30/Pin 32): The (–) Input to the Output Cur-
rent Monitor
Amplifier. Connect this pin to V
OUT
when not
in use. See Applications Information section for proper
use of this pin.
LT8705
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CSPOUT (Pin 31/Pin 34): The (+) Input to the Output
Current Monitor Amplifier. This pin and the CSNOUT pin
measure the voltage across the sense resistor, R
SENSE2
,
to provide the output current signals. Connect this pin
to V
OUT
when not in use. See Applications Information
section for proper use of this pin.
CSNIN (Pin 32/Pin 36): The (–) Input to the Input Current
Monitor Amplifier. This pin and the CSPIN pin measure
the voltage across the sense resistor, R
SENSE1
, to provide
the input current signals. Connect this pin to V
IN
when not
in use. See Applications Information section for proper
use of this pin.
CSPIN (Pin 33/Pin 37): The (+) Input to the Input Cur
-
rent Monitor Amplifier. Connect this pin to V
IN
when not
in use. See Applications Information section for proper
use of this pin.
V
IN
(Pin 34/Pin 38): Main Input Supply Pin. It must be
locally bypassed to ground.
INTV
CC
(Pin 35/Pin 1): Internal 6.35V Regulator Output.
Must be connected to the GATEV
CC
pin. INTV
CC
is powered
from EXTV
CC
when the EXTV
CC
voltage is higher than 6.4V,
otherwise INTV
CC
is powered from V
IN
. Bypass this pin to
ground with a minimum 4.7μF ceramic capacitor.
SWEN (Pin 36 QFN Only):
Switch Enable Pin. Tie high
to enable switching. Ground to disable switching. Don’t
float this pin. This pin is internally tied to INTV
CC
in the
TSSOP package.
IMON_IN (Pin 38/Pin 3): Input Current Monitor Pin. The
current out of this pin is proportional to the input current.
See the Operation and Applications Information sections.
MODE (Pin 37/Pin 2): Mode Pin. The voltage applied to
this pin sets the operating mode of the controller. When
the applied voltage is less than 0.4V, the forced continu
-
ous current
mode is active. When this pin is allowed to
float,
Burst Mode operation is active. When the MODE pin
voltage is higher than 2.3V, discontinuous mode is active.
GND (Pin 13, Exposed Pad Pin 39/Pin 16, Exposed Pad
Pin 39): Ground. Tie directly to local ground plane.
pin FuncTions
(QFN/TSSOP)

LT8705MPFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 80V Vin and Vout Synchronous 4-Switch Buck- Boost DC/DC Controller
Lifecycle:
New from this manufacturer.
Delivery:
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