NTLJS4114NTAG

NTLJS4114N
http://onsemi.com
4
TYPICAL PERFORMANCE CURVES (T
J
= 25°C unless otherwise noted)
5 5 15 20 25
GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
Figure 7. Capacitance Variation
200
V
GS
V
DS
1000
010
C
oss
C
rss
1600
C
iss
Figure 8. GateToSource and DrainToSource
Voltage versus Total Charge
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
R
G
, GATE RESISTANCE (OHMS)
1 10 100
1000
1
t, TIME (ns)
100
t
r
t
d(off)
t
d(on)
t
f
10
V
DD
= 15 V
I
D
= 3.0 A
V
GS
= 4.5 V
4
0
0.3
V
SD
, SOURCETODRAIN VOLTAGE (V)
I
S
, SOURCE CURRENT (AMPS)
V
GS
= 0 V
Figure 10. Diode Forward Voltage versus Current
0.8
1
0.6
2
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1 1 100
V
DS
, DRAINTOSOURCE VOLTAGE (V)
1
100
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
10
SINGLE PULSE
T
C
= 25°C
T
J
= 150°C
1 ms
100 ms
10 ms
dc
10 ms
30
T
J
= 25°C
0.1
0.01
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
0
3
0
Q
G
, TOTAL GATE CHARGE (nC)
5
4
4
I
D
= 2 A
T
J
= 25°C
V
GS
Q
GS
Q
GD
QT
2
1
8
8
0
20
12
4
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
V
DS
16
3
0.70.50.4
See Note 2 on Page 1
400
V
DS
= 0 V
V
GS
= 0 V
T
J
= 25°C
NTLJS4114N
http://onsemi.com
5
TYPICAL PERFORMANCE CURVES (T
J
= 25°C unless otherwise noted)
Figure 12. Thermal Response
t, TIME (s)
1
1000
0.1
0.2
0.02
D = 0.5
0.05
0.01
SINGLE PULSE
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
T
A
= P
(pk)
R
q
JA
(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
100 1000100.10.0010.00010.000001
0.1
100
10
10.010.00001
EFFECTIVE TRANSIENT THERMAL RESISTANCE
See Note 2 on Page 1
NTLJS4114N
http://onsemi.com
6
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.20mm FROM
TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL
LEAD IS CONNECTED TO TERMINAL LEAD # 4.
6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.
C
A
SEATING
PLANE
D
B
E
0.10 C
A3
A
A1
2X
2X
0.10 C
WDFN6 2x2
CASE 506AP
ISSUE B
DIM
A
MIN MAX
MILLIMETERS
0.70 0.80
A1 0.00 0.05
A3 0.20 REF
b 0.25 0.35
b1
0.65 REF
D
D2
E
E2
0.27 REF
e
0.15 REF
K
L
PIN ONE
REFERENCE
0.08 C
0.10 C
7X
A0.10 C
NOTE 3
L
e
D2
E2
b
B
3
6
6X
1
K
4
6X
0.05 C
4X
J
J1
A0.10 C
b1
B
6X
0.05 C
L2
NOTE 5
L2
J
J1
0.51 0.61
2.00 BSC
1.00 1.20
2.00 BSC
1.10 1.30
0.65 BSC
0.20 0.30
0.20 0.30
BOTTOM VIEW
2.30
6X
PITCH
1
1.25
0.60
0.35
0.65
0.66
6X
0.43
DIMENSIONS: MILLIMETERS
1.10
0.35
0.34
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NTLJS4114N/D
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
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and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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NTLJS4114NTAG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
MOSFET NFET WDFN6 30V 7.8A
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