VEML6040
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Rev. 1.6, 21-Nov-16
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Document Number: 84276
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Digital Interface
The VEML6040 contains a CONF register (00h) used for operation control and parameter setup. Measurement results are stored
in four separate registers, one each for red, green, blue, and white respectively (08h to 0Bh). All registers are accessible via I
2
C
communication. Figure 8 shows the basic I
2
C communication with the VEML6040. Each of the registers in the VEML6040 are
16 bit wide, so 16 bit should be written when a write command is sent, and 16 bit should be read when a read command is sent.
The built in I
2
C interface is compatible with I
2
C modes “standard” and “fast”: 100 kHz to 400 kHz
Fig. 8 - Command Protocol Format
Note
Please note the repeat start condition when data is read from the sensor. A stop condition should not be sent here.
Slave Address and Function Description
VEML6040 uses 10h slave address for 7-bit I
2
C addressing protocol. VEML6040 has 16-bit resolution for each channel (R, G,
B, and W) that provides sensitivity up to 0.0056 lux/step for G, which is advantageous under a low transmittance lens design
(dark lens).
Note
Slave address is 7-bit addressing protocol
TABLE 1 - SLAVE ADDRESS AND COMMAND CODE DESCRIPTION
SLAVE ADDRESS 0x10
COMMAND
CODE
DATE BYTE
LOW / HIGH
REGISTER
NAME
R / W
BIT
76543210
00h
L CONF R / W 0 IT (2 : 0) 0 TRIG AF SD
H Reserved R / W Reserved
01h to 07h
L Reserved R / W Reserved
H Reserved R / W Reserved
08h
L R_DATA R R_Data (7 : 0)
H R_DATA R R_Data (15 : 8)
09h
L G_DATA R G_Data (7 : 0)
H G_DATA R G_Data (15 : 8)
0Ah
L B_DATA R B_Data (7 : 0)
H B_DATA R B_Data (15 : 8)
0Bh
L W_DATA R W_Data (7 : 0)
H W_DATA R W_Data (15 : 8)
S Slave address
Wr
A Command code A Data byte low A Data byte high A
17 811 1
818
P
11
Send Word ɦġWrite Command to VEML6040
1
Slave address
7
Wr
A Command code A S Slave address
Rd
A Data byte low A
Data byte high A P
11811711818 11
S
Receive Word ɦġRead Data from VEML6040
S = start condition
P = stop condition
A = acknowledge
Shaded area = VEML6040 acknowledge
VEML6040
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Vishay Semiconductors
Rev. 1.6, 21-Nov-16
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Document Number: 84276
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Configuration Register Format
VEML6040 has a 16-bit configuration register for controlling. The description of each command format is shown in the following
tables.
TABLE 2-1 - COMMAND CODE 00H BITS DESCRIPTION
SLAVE ADDRESS: 0x10; REGISTER NAME: CONF; COMMAND CODE: 00H / DATA BYTE LOW
XITXTRIGAFSD
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0IT2IT1IT00TRIGAFSD
DESCRIPTION
IT Integration time setting
TRIG Proceed one detecting cycle at manual force mode
AF Auto / manual force mode
SD Chip shutdown setting
TABLE 2-2 - COMMAND CODE 00H REGISTER SETTING
BITS SETTING DESCRIPTION BITS SETTING DESCRIPTION
BIT 7 Default = 0 BIT 3 Default = 0
BIT 6, 5, 4
IT (2 : 0)
(0 : 0 : 0) = 40 ms
BIT 2
TRIG
0 = no trigger
(0 : 0 : 1) = 80 ms 1 = trigger one time detect cycle
(0 : 1 : 0) = 160 ms
BIT 1
AF
0 = auto mode
(0 : 1 : 1) = 320 ms 1 = force mode
(1 : 0 : 0) = 640 ms
BIT 0
SD
0 = enable color sensor
(1 : 0 : 1) = 1280 ms 1 = disable color sensor
TABLE 3-1 - RESERVE COMMAND CODE DESCRIPTION
RESERVED COMMAND CODE: 00H / DATA BYTE HIGH
Command Bit Description
Reserved 7 : 0 Default = 0x00
TABLE 3-2 - RESERVE COMMAND CODE DESCRIPTION
RESERVED COMMAND CODE: 01H TO 07H
Command Bit Description
Reserved 7 : 0 Default = 0x00
TABLE 4 - READ OUT COMMAND CODE DESCRIPTION
REGISTER COMMAND CODE BIT DESCRIPTION
R_DATA
0x08_L (08H data byte low) 7 : 0 0x00 to 0xFF, R channel LSB output data
0x08_H (08H data byte high) 7 : 0 0x00 to 0xFF, R channel MSB output data
G_DATA
0x09_L (09H data byte low) 7 : 0 0x00 to 0xFF, G channel LSB output data
0x09_H (09H data byte high) 7 : 0 0x00 to 0xFF, G channel MSB output data
B_DATA
0x0A_L (0AH data byte low) 7 : 0 0x00 to 0xFF, B channel LSB output data
0x0A_H (0AH data byte high) 7 : 0 0x00 to 0xFF, B channel MSB output data
W_DATA
0x0B_L (0BH data byte low) 7 : 0 0x00 to 0xFF, W channel LSB output data
0x0B_H (0BH data byte high) 7 : 0 0x00 to 0xFF, W channel MSB output data
VEML6040
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Vishay Semiconductors
Rev. 1.6, 21-Nov-16
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Document Number: 84276
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Data Access
Each of the R, G, B, and W result registers has a 16-bit resolution (2 bytes). One byte is the LSB and the other byte is the MSB.
The host needs to follow the read word protocol as shown in figure 7. The data format shows as below.
Note
Data byte low represents LSB and data byte high represents MSB.
The integration time settings result in the corresponding resolutions that are shown in table 6.
Data Auto-Memorization
VEML6040 keeps the last results read. These values will remain in the registers, and can be read from these registers, until the
device wakes up and a new measurement is made.
Lux and CCT Calculation
In order to use the results to calculate the lux or correlated color temperature, please refer to the “Designing the VEML6040 into
an Application” application note (www.vishay.com/doc?84331
).
TABLE 5 - 16-BIT DATA FORMAT
VEML6040 16-BIT DATA FORMAT
Data bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data byte low
Data byte high
TABLE 6 - G CHANNEL RESOLUTION AND MAXIMUM DETECTION RANGE
IT SETTINGS
G SENSITIVITY MAX. DETECTABLE LUX
IT (2 : 0) INTEGRATION TIME
(0 : 0 : 0) 40 ms 0.25168 16 496
(0 : 0 : 1) 80 ms 0.12584 8248
(0 : 1 : 0) 160 ms 0.06292 4124
(0 : 1 : 1) 320 ms 0.03146 2062
(1 : 0 : 0) 640 ms 0.01573 1031
(1 : 0 : 1) 1280 ms 0.007865 515.4
Slave address
Wr
A Command code A S Slave address
Rd
A Data byte low A
Data byte high A P
S

VEML6040A3OG

Mfr. #:
Manufacturer:
Vishay Semiconductors
Description:
Photo IC Sensors RGBW Clr Snsr w/I2C 16-Bit 2.5-3.6V
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New from this manufacturer.
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