MAX520/MAX521
Quad/Octal, 2-Wire Serial 8-Bit DACs
with Rail-to-Rail Outputs
4 _______________________________________________________________________________________
Note 1: Input resistance is code dependent. The lowest input resistance occurs at code = 55 hex.
Note 2: Input capacitance is code dependent. The highest input capacitance occurs at code = FF hex.
Note 3: V
REF_
= 4Vp-p, 10kHz. Channel-to-channel isolation is measured by setting the code of one DAC to FF hex and setting the
code of all other DACs to 00 hex.
Note 4: V
REF_
= 4Vp-p, 10kHz, DAC code = 00 hex.
Note 5: Guaranteed by design.
Note 6: I
2
C-compatible mode.
Note 7: Output settling time is measured by taking the code from 00 hex to FF hex, and from FF hex to 00 hex.
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±10%, V
REF_
= 4V, R
L
= (MAX520), R
L
= 10k(MAX521), C
L
= 0pF (MAX520), C
L
= 100pF (MAX521), T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C)
MAX521BM
MAX521_C
0.7MAX521_E
MAX520_
1.0
MAX521_C
MAX521_E/BM
Power-down mode (PD = 1)
10 20
420
Positive and negative
CONDITIONS
V/µs
0.5
Voltage Output Slew Rate
Operating mode, out-
put unloaded, all dig-
ital inputs 0V or V
DD
mA
420
I
DD
10 24
Supply Current
UNITSMIN TYP MAXSYMBOLPARAMETER
MAX520_, to 1/2LSB, no load
µs
2
Output Settling Time
Code = 00 hex, all digital inputs from
0V to V
DD
nV-s5Digital Feedthrough
MAX521_, to 1/2LSB, 10kand
100pF load (Note 7)
6
Code 128 to 127 nV-s12Digital-Analog Glitch Impulse
V
REF_
= 4Vp-p at 1kHz, V
DD
= 5V,
code = FF hex
dB87SINADSignal to Noise + Distortion Ratio
V
REF_
= 4Vp-p, 3dB bandwidth MHz1Multiplying Bandwidth
MAX521_ µV
RMS
60Wideband Amplifier Noise
V4.5 5.5V
DD
Supply Voltage
µA
µA
DYNAMIC PERFORMANCE
POWER REQUIREMENTS
MAX520/MAX521
Quad/Octal, 2-Wire Serial 8-Bit DACs
with Rail-to-Rail Outputs
_______________________________________________________________________________________ 5
Note 8: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 9: Cb = total capacitance of one bus line in pF. t
R
and t
f
measured between 0.3V
DD
and 0.7V
DD
.
Note 10: An input filter on the SDA and SCL input suppresses noise spikes less than 50ns.
Note 11: Guaranteed by design.
Hold Time, (Repeated) Start Condition t
HD, STA
0.6 µs
Low Period of the SCL Clock t
LOW
1.3 µs
High Period of the SCL Clock t
HIGH
0.6
PARAMETER SYMBOL MIN TYP MAX UNITS
Serial Clock Frequency f
SCL
0 400 kHz
Bus Free Time Between a STOP and a
START Condition
t
BUF
1.3 µs
CONDITIONS
µs
Setup Time for a Repeated START Condition t
SU, STA
0.6 µs
Data Hold Time t
HD, DAT
0 0.9 µs
Data Setup Time t
SU, DAT
100
(Note 8)
ns
Fall Time of SDA Transmitting (Note 6) t
F
20 + 0.1Cb 250 ns
Setup Time for STOP Condition t
SU, STO
0.6 µs
Capacitive Load for Each Bus Line Cb 400
I
SINK
6mA (Note 9)
pF
Rise Time of Both SDA and SCL Signals, Receiving t
R
20 + 0.1Cb 300 ns
Fall Time of Both SDA and SCL Signals, Receiving t
F
20 + 0.1Cb 300
(Note 9)
(Note 9) ns
Pulse Width of Spike Suppressed t
SP
050(Notes 10, 11) ns
TIMING CHARACTERISTICS
(V
DD
= 5V ±10%, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
__________________________________________Typical Operating Characteristics
(V
DD
= 5V, DAC outputs unloaded, T
A
= +25°C, unless otherwise noted.)
10
9
0
-60 -30 30 90 120 150
MAX520
SUPPLY CURRENT vs. TEMPERATURE
2
1
8
7
MAX520/521-01
TEMPERATURE (°C)
I
DD
(µA)
060
6
5
4
3
OPERATING MODE OR
SHUTDOWN MODE
40
0
-60 -30 30 90 120 150
MAX520
REFERENCE INPUT CURRENT vs.
TEMPERATURE (SHUTDOWN MODE)
5
35
30
MAX520/521-02
TEMPERATURE (°C)
SHUTDOWN REFERENCE CURRENT (nA)
060
25
20
15
10
V
REF
= 4V
ONE REF INPUT DRIVEN
0
1k 100k10k 1M 10M
MAX520
REFERENCE VOLTAGE INPUT
FREQUENCY RESPONSE
-16
-18
MAX520/521-03
FREQUENCY (Hz)
RELATIVE OUTPUT (dB)
-14
-12
-10
-8
-6
-4
-2
2
V
DD
= 5V
V
REF
= 4Vp-p SINE WAVE
CENTERED AT 2.5V
MAX520/MAX521
Quad/Octal, 2-Wire Serial 8-Bit DACs
with Rail-to-Rail Outputs
6 _______________________________________________________________________________________
______________________________Typical Operating Characteristics (continued)
(V
DD
= 5V, DAC outputs unloaded, T
A
= +25°C, unless otherwise noted.)
OUT2 = NO LOAD, REF2 = 4V,
DAC CODE = 00 HEX to FF HEX
1µs/div
MAX520
POSITIVE SETTLING TIME
OUT2
1V/div
OUT2 = NO LOAD, REF2 = 4V,
DAC CODE = FF HEX to 00 HEX
1µs/div
MAX520
NEGATIVE SETTLING TIME
OUT2
1V/div
REF2 = 4V, DAC CODE = 7F HEX to 80 HEX
500ns/div
MAX520
WORST-CASE 1LSB DIGITAL STEP CHANGE
(CAPACITIVE LOAD < 5pF)
OUT2
20mV/div
AC COUPLED
REF2 = 4V, DAC CODE = 7F HEX to 80 HEX
500ns/div
MAX520
WORST-CASE 1LSB DIGITAL STEP CHANGE
(CAPACITIVE LOAD = 25pF)
OUT2
20mV/div
AC COUPLED

MAX521AEAG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 8-Bit 8Ch Precision DAC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union