4
LTC1649
G1 (Pin 1): Driver Output 1. Connect this pin to the gate of
the upper N-channel MOSFET, Q1. This output will swing
from P
VCC1
to GND. G1 will always be low when G2 is high.
In shutdown, G1 and G2 go low.
P
VCC1
(Pin 2): Power V
CC
for Driver 1. This is the power
supply input for G1. G1 will swing from P
VCC1
to GND.
P
VCC1
must be connected to a potential of at least V
IN
+
V
GS(ON)
(Q1). This potential can be generated using a
simple charge pump connected to the switching node
between the two external MOSFETs as shown in Figure 1.
GND (Pin 3): System Ground. Connect to a low impedance
ground in close proximity to the source of Q2. The system
signal and power grounds should meet at only one point,
at the GND pin of the LTC1649.
FB (Pin 4): Feedback. The FB pin is connected to the output
through a resistor divider to set the output voltage.
V
OUT
= V
REF
[1 + (R1/R2)].
SHDN (Pin 5): Shutdown, Active Low. A TTL compatible
LOW level at SHDN for more than 50µs puts the LTC1649
into shutdown mode. In shutdown, G1, G2, COMP and SS
go low, and the quiescent current drops to 25µA max.
CP
OUT
remains at 5V in shutdown mode. A TTL compatible
HIGH level at SHDN allows the LTC1649 to operate nor-
mally.
SS (Pin 6): Soft Start. An external capacitor from SS to
GND controls the startup time and also compensates the
current limit loop, allowing the LTC1649 to enter and exit
current limit cleanly.
V
IN
(Pin 7): Charge Pump Input. This is the main low
voltage power supply input. V
IN
requires an input voltage
between 3V and 5V. Bypass V
IN
to ground with a 1µF
ceramic capacitor located close to the LTC1649.
C
(Pin 8): Flying Capacitor, Negative Terminal. Connect
a 1µF ceramic capacitor from C
to C
+
.
C
+
(Pin 9): Flying Capacitor, Positive Terminal.
CP
OUT
(Pin 10): Charge Pump Output. CP
OUT
provides a
regulated 5V output to provide power for the internal
switching circuitry and gate drive for the external MOSFETs.
CP
OUT
should be connected directly to P
VCC2
in most
applications. At least 10µF of reservoir capacitance to
ground is required at CP
OUT
. This requirement can usually
be met by the bypass capacitor at P
VCC2
.
COMP (Pin 11): External Compensation. The COMP pin is
connected directly to the output of the internal error
amplifier and the input of the PWM generator. An RC
network is used at this node to compensate the feedback
loop to provide optimum transient response.
I
MAX
(Pin 12): Current Limit Set. I
MAX
sets the threshold
for the internal current limit comparator. If I
FB
drops below
I
MAX
with G1 on, the LTC1649 will go into current limit.
I
MAX
has an internal 12µA pull-down to GND. The voltage
at I
MAX
can be set with an external resistor to the drain of
Q1 or with an external voltage source.
I
FB
(Pin 13): Current Limit Sense. Connect to the switched
node at the source of Q1 and the drain of Q2 through a 1k
resistor. The resistor is required to prevent voltage tran-
sients at the switched node from damaging the I
FB
pin. I
FB
can be taken up to 18V above GND without damage.
V
CC
(Pin 14): Internal Power Supply. V
CC
provides power
to the feedback amplifier and switching control circuits.
V
CC
is designed to run from the 5V supply provided by
CP
OUT
. V
CC
requires a 10µF bypass capacitor to GND.
P
VCC2
(Pin 15): Power V
CC
for Driver 2. This is the power
supply input for G2. G2 will swing from P
VCC2
to GND.
P
VCC2
must be connected to a potential of at least
V
GS(ON)
(Q2). This voltage is usually supplied by the CP
OUT
pin. P
VCC2
requires a bypass capacitor to GND; this
capacitor also provides the reservoir capacitance required
by the CP
OUT
pin.
G2 (Pin 16): Driver Output 2. Connect this pin to the gate
of the lower N-channel MOSFET, Q2. This output will
swing from P
VCC2
to GND. G2 will always be low when G1
is high. In shutdown, G1 and G2 go low.
PIN FUNCTIONS
UUU
5
LTC1649
BLOCK DIAGRA
W
+
+
I
LIM
FB MIN
PWM
MAX
+
40mV
+
1.26V
12µA
+
40mV
12µA
PV
CC1
CP
OUT
C
+
SHDN
COMP
SS
I
MAX
V
CC
PV
CC2
G1
G2
I
FB
FB
1649 BD
INTERNAL
SHUTDOWN
50µs
DELAY
V
IN
CHARGE
PUMP
C
TEST CIRCUIT
Figure 1
V
CC
V
OUT
2.5V
I
MAX
SHDN
1µF
G2
FB
V
IN
V
IN
3.3V
C
+
LTC1649
P
VCC2
P
VCC1
G1
I
FB
COMP
SS C
GND CP
OUT
1µF
10µF
MBR0530
0.1µF
C
C
0.01µF
R
C
7.5k
L
EXT
1.2µH
C1
220pF
10µF
MBR0530
R
IMAX
50k
22 1k
Q3
IRF7801
Q1, Q2
IRF7801
TWO IN
PARALLEL
C
OUT
4400µF
C
IN
3300µF
SHDN
R2
12.7k
R1
12.4k
1649 TA03
+
0.33µF
+
+
+
6
LTC1649
APPLICATIONS INFORMATION
WUU
U
OVERVIEW
T
he LTC1649 is a voltage feedback PWM switching regu-
lator controller (see Block Diagram) designed for use in
high power, low input voltage step-down (buck) convert-
ers. It includes an onboard PWM generator, a precision
reference trimmed to ±0.5%, two high power MOSFET
gate drivers and all necessary feedback and control cir-
cuitry to form a complete switching regulator circuit. Also
included is an internal charge pump which provides 5V
gate drive to the external MOSFETs with input supply
voltage as low as 2.7V. The LTC1649 runs at an internally
fixed 200kHz clock frequency and requires an external
resistor divider to set the output voltage.
The LTC1649 includes a current limit sensing circuit that
uses the upper external power MOSFET as a current
sensing element, eliminating the need for an external
sense resistor. Also included is an internal soft start
feature that requires only a single external capacitor to
operate.
THEORY OF OPERATION
Primary Feedback Loop
The LTC1649 senses the output voltage of the circuit at the
output capacitor through a resistor divider connected to
the FB pin and feeds this voltage back to the internal
transconductance amplifier FB. FB compares the resistor-
divided output voltage to the internal 1.26V reference and
outputs an error signal to the PWM comparator. This is
then compared to a fixed frequency sawtooth waveform
generated by the internal oscillator to generate a pulse
width modulated signal. This PWM signal is fed back to the
external MOSFETs through G1 and G2, closing the loop.
Loop compensation is achieved with an external compen-
sation network at COMP, the output node of the FB
transconductance amplifier.
MIN, MAX Feedback Loops
Two additional comparators in the feedback loop provide
high speed fault correction in situations where the FB
amplifier may not respond quickly enough. MIN compares
the feedback signal to a voltage 40mV (3%) below the
internal reference. At this point, the MIN comparator
overrides the FB amplifier and forces the loop to full duty
cycle, set by the internal oscillator at about 93%. Similarly,
the MAX comparator monitors the output voltage at 3%
above the internal reference and forces the output to 0%
duty cycle when tripped. These two comparators prevent
extreme output perturbations with fast output transients,
while allowing the main feedback loop to be optimally
compensated for stability.
Current Limit Loop
The LTC1649 includes yet another feedback loop to con-
trol operation in current limit. The I
LIM
amplifier monitors
the voltage drop across external MOSFET Q1 with the I
FB
pin during the portion of the cycle when G1 is high. It
compares this voltage to the voltage at the I
MAX
pin. As the
peak current rises, the drop across Q1 due to its R
DS(ON)
increases. When I
FB
drops below I
MAX
, indicating that Q1’s
drain current has exceeded the maximum level, I
LIM
starts
to pull current out of the external soft start capacitor,
cutting the duty cycle and controlling the output current
level. At the same time, the I
LIM
comparator generates a
signal to disable the MIN comparator to prevent it from
conflicting with the current limit circuit. If the internal
feedback node drops below about 0.8V, indicating a se-
vere output overload, the circuitry will force the internal
oscillator to slow down by a factor of as much as 100. If
desired, the turn on time of the current limit loop can be
controlled by adjusting the size of the soft start capacitor,
allowing the LTC1649 to withstand brief overcurrent con-
ditions without limiting.
By using the R
DS(ON)
of Q1 to measure the output current,
the current limit circuit eliminates the sense resistor that
would otherwise be required and minimizes the number of
components in the external high current path. Because
power MOSFET R
DS(ON)
is not tightly controlled and varies
with temperature, the LTC1649 current limit is not de-
signed to be accurate; it is meant to prevent damage to the
power supply circuitry during fault conditions. The actual
current level where the limiting circuit begins to take effect
may vary from unit to unit, depending on the power
MOSFETs used. See Soft Start and Current Limit for more
details on current limit operation.

LTC1649CS#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 3.3V In Hi Pwr Buck Sw Reg Cntr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union