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MC14007UBD

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 11
1 Publication Order Number:
MC14007UB/D
MC14007UB
Dual Complementary Pair
Plus Inverter
The MC14007UB multipurpose device consists of three N−Channel
and three P−Channel enhancement mode devices packaged to provide
access to each device. These versatile parts are useful in inverter
circuits, pulse−shapers, linear amplifiers, high input impedance
amplifiers, threshold detectors, transmission gating, and functional
gating.
Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4007A or CD4007UB
• This device has 2 outputs without ESD Protection. Antistatic
precautions must be taken.
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V
SS
)
Symbol Parameter Value Unit
V
DD
DC Supply Voltage Range −0.5 to +18.0 V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
−0.5 to V
DD
+0.5 V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
± 10 mA
P
D
Power Dissipation, per Package
(Note 1)
500 mW
T
A
Ambient Temperature Range −55 to +125 °C
T
stg
Storage Temperature Range −65 to +150 °C
T
L
Lead Temperature
(8 second Soldering)
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/°C from 65°C 5o 125°C.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
11
12
13
14
8
9
105
4
3
2
1
7
6
GATE
C
S−P
C
OUT
C
D−P
A
V
DD
D−N
A
S−N
C
S−N
B
GATE
B
S−P
B
D−P
B
V
SS
GATE
A
D−N
B
PIN ASSIGNMENT
D = DRAIN
S = SOURCE
MARKING DIAGRAM
SOIC−14
D SUFFIX
CASE 751A
1
14
14007UG
AWLYWW
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Indicator
http://onsemi.com
MC14007UB
http://onsemi.com
2
Figure 1. Typical Application: 2−Input Analog Multiplexer
A
B
C
INPUT
INPUT
A
B
C
12
1
3
5
9
2
4
11
10
14
V
DD
6
7V
SS
8
13
INPUT
1
0
OUTPUT CONDITION
A = C, B = OPEN
A = B, C = OPEN
Substrates of P−Channel devices internally
connected to V
DD
; substrates of N−Channel
devices internally connected to V
SS
.
Figure 2. Schematic
14 13 2 1 11
126
78 3 4 510 9
V
DD
= PIN 14
V
SS
= PIN 7
MC14007UB
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
Symbo
l
Characteristic
V
DD
Vdc
−55°C 25°C 125°C
Unit
Min Max Min
Typ
(Note 2)
Max Min Max
V
OL
Output Voltage “0” Leve
l
V
in
= V
DD
or 0
V
in
= 0 or V
DD
“1” Leve
l
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
V
OH
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
Vdc
V
IL
Input Voltage “0” Leve
l
(V
O
= 4.5 Vdc)
(V
O
= 9.0 Vdc)
(V
O
= 13.5 Vdc)
(V
O
= 0.5 Vdc) “1” Leve
l
(V
O
= 1.0 Vdc)
(V
O
= 1.5 Vdc)
5.0
10
15
−
−
−
1.0
2.0
2.5
−
−
−
2.25
4.50
6.75
1.0
2.0
2.5
−
−
−
1.0
2.0
2.5
Vdc
V
IH
5.0
10
15
4.0
8.0
12.5
−
−
−
4.0
8.0
12.5
2.75
5.50
8.25
−
−
−
4.0
8.0
12.5
−
−
−
Vdc
I
OH
Output Drive Current
(V
OH
= 2.5 Vdc) Source
(V
OH
= 4.6 Vdc)
(V
OH
= 9.5 Vdc)
(V
OH
= 13.5 Vdc)
(V
OL
= 0.4 Vdc) Sin
k
(V
OL
= 0.5 Vdc)
(V
OL
= 1.5 Vdc)
5.0
5.0
10
15
–3.0
–0.64
–1.6
–4.2
−
−
−
−
–2.4
–0.51
−1.3
−3.4
–5.0
–1.0
–2.5
–10
−
−
−
−
–1.7
−0.36
–0.9
−2.4
−
−
−
−
mAdc
I
OL
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
1.0
2.5
10
−
−
−
0.36
0.9
2.4
−
−
−
mAdc
I
in
Input Current 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0
mAdc
C
in
Input Capacitance
(V
in
= 0)
− − − − 5.0 7.5 − − pF
I
DD
Quiescent Current
(Per Package)
5.0
10
15
−
−
−
0.25
0.5
1.0
−
−
−
0.0005
0.0010
0.0015
0.25
0.5
1.0
−
−
−
7.5
15
30
mAdc
I
T
Total Supply Current (Notes 3 and 4)
(Dynamic plus Quiescent,
Per Gate) (C
L
= 50 pF)
5.0
10
15
I
T
= (0.7 mA/kHz) f + I
DD
/6
I
T
= (1.4 mA/kHz) f + I
DD
/6
I
T
= (2.2 mA/kHz) f + I
DD
/6
mAdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25°C.
4. To calculate total supply current at loads other than 50 pF: I
T
(C
L
) = I
T
(50 pF) + (C
L
− 50) Vfk
where: I
T
is in mA (per package), C
L
in pF, V = (V
DD
− V
SS
) in volts, f in kHz is input frequency, and k = 0.003.
P1-P3P4-P6P7-P7

MC14007UBD

Mfr. #:
Buy MC14007UBD
Manufacturer:
ON Semiconductor
Description:
IC COMP DUAL PAIR W/INV 14-SOIC
Lifecycle:
New from this manufacturer.
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