NCN5130
www.onsemi.com
22
Table 7. STATUS OF SEVERAL BLOCKS DURING THE DIFFERENT (ANALOG) STATES
State Osc XCLK VDD1 VDD2/V20V SPI/UART KNX
Reset Off Off Off Off Inactive Inactive
Start−Up Off Off Start−up Off Inactive Inactive
Stand−By (Note 18) Off 4 MHz On Start−Up Active Inactive
(Note 23)
Stand−By (Note 19) On
(Note 21)
On
(Note 21)
On On (Note 22) Active Inactive
(Note 23)
Normal On On
(Note 20)
On On Active Active
18.Only valid when entering Stand−By from Start−Up State.
19.Only valid when entering Stand−By from Normal State.
20.8 MHz or 16 MHz depending on XCLKC.
21.4 MHz signal if Stand−By state was entered due to oscillator issue. Otherwise 8 MHz or 16 MHz clock signal.
22.Only operational if Stand−By state was not entered due to VDD2 or V20V issue.
23.Under certain conditions KNX bus is (partly) active. See Digital State Diagram for more details.
Temperature Monitor
The device produces an over−temperature warning (TW)
and a thermal shutdown warning (TSD). Whenever the
junction temperature rises above the Thermal Warning level
(T
TW
), the SAVEB−pin will go low to signal the issue to the
host controller. Because the SAVEB−pin will not only go
low on a Thermal Warning (TW), the host controller needs
to verify the issue by requesting the status (<TW>, see
System Status Service, p37). When the junction temperature
is above TW, the host controller should undertake actions to
reduce the junction temperature and/or store critical data.
When the junction temperature reaches Thermal
Shutdown (T
TSD
), the device will go to the Reset State. The
Thermal Shutdown will be stored (<TSD>, see Analog
Status Register, p56) and the analog and digital power
supply will be stopped (to protect the device). The device
will stay in the Reset State as long as the temperature stays
above T
TSD
.
If the temperature drops below T
TSD
, Start−Up State will
be entered (see also Figure 19). At the moment VDD1 is
back up and the OTP memory is read, Stand−By State will
be entered and RESETB will go high. The Xtal oscillator
will be started. Once the temperature has dropped below
T
TW
and all voltages are high enough, Normal State will be
entered. SAVEB will go high and KNX communication is
again possible.
The TW−bit will be reset at the moment the junction
temperature drops below T
TW
. The TSD−bit will only be
reset when the junction temperature is below T
TSD
and the
<TSD> bit is read (see Analog Status Register, p56).
Figure 8 gives a better view on the temperature monitor.
Watchdog
NCN5130 provides a Watchdog function to the host
controller. The Watchdog function can be enabled by means
of the WDEN−bit (<WDEN>, see Watchdog Register, p54).
Once this bit is set to ‘1’, the host controller needs to re−write
this bit to clear the internal timer before the Watchdog
Timeout Interval expires (Watchdog Timeout Interval =
<WDT>, see Watchdog Register, p54).
In case the Watchdog is acknowledged too early (before
t
WDPR
) or not within the Watchdog Timeout Interval
(t
WDTO
), the RESETB−pin will be made low (= reset host
controller).
Table 8 gives the Watchdog timings t
WDTO
and t
WDPR
.
Details on <WDT> can be found in the Watchdog Register,
p54.
Table 8. WATCHDOG TIMINGS
WDT[3:0] t
WDTO
[ms] t
WDPR
[ms]
0000 33 2
0001 66 4
0010 98 6
0011 131 8
0100 164 10
0101 197 12
0110 229 14
0111 262 16
1000 295 18
1001 328 20
1010 360 23
1011 393 25
1100 426 27
1101 459 29
1110 492 30
1111 524 31
