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74AUP1G86GN,132
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P22
74AUP1G86
All information pr
ovided in this d
ocument is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
. 5 — 28 Jun
e 2012
15 of 21
NXP Semiconductors
74AUP1G86
Low-power 2-input EXCLUSIVE-OR gate
Fig 13.
Package
outline SOT1
1
15 (XSON6)
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
SOT1115
sot1115_po
10-04-02
10-04-07
Unit
mm
max
nom
min
0.35
0.04
0.95
0.90
0.85
1.05
1.00
0.95
0.55
0.3
0.40
0.35
0.32
A
(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
SOT1115
A
1
b
0.20
0.15
0.12
DE
e
e
1
L
0.35
0.30
0.27
L
1
0
0.5
1 mm
scale
terminal 1
index area
D
E
(4
×
)
(2)
e
1
e
1
e
L
L
1
b
3
2
1
6
5
4
(6
×
)
(2)
A
1
A
74AUP1G86
All information pr
ovided in this d
ocument is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
. 5 — 28 Jun
e 2012
16 of 21
NXP Semiconductors
74AUP1G86
Low-power 2-input EXCLUSIVE-OR gate
Fig 14.
Package
outline SOT1202 (XSON
6)
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
SOT1202
sot1202_po
10-04-02
10-04-06
Unit
mm
max
nom
min
0.35
0.04
1.05
1.00
0.95
1.05
1.00
0.95
0.55
0.35
0.40
0.35
0.32
A
(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
A
1
b
0.20
0.15
0.12
DE
e
e
1
L
0.35
0.30
0.27
L
1
0
0.5
1 mm
scale
terminal 1
index area
D
E
(4
×
)
(2)
e
1
e
1
e
L
b
123
L
1
6
5
4
(6
×
)
(2)
A
A
1
74AUP1G86
All information pr
ovided in this d
ocument is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
. 5 — 28 Jun
e 2012
17 of 21
NXP Semiconductors
74AUP1G86
Low-power 2-input EXCLUSIVE-OR gate
Fig 15.
Package
outline SOT1226 (X2SON5)
References
Outline
version
European
projection
Issue date
IEC
JEDEC
EIAJ
SOT1226
sot1226_po
12-04-10
12-04-25
Unit
mm
max
nom
min
0.35
0.85
0.80
0.75
0.04
0.30
0.25
0.20
0.85
0.80
0.75
0.27
0.22
0.17
0.05
A
(1)
Dimensions
Note
1. Dimension A is including plating thickness.
2. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
SOT1226
A
1
A
3
0.128
0.040
DD
h
Eb
e
0.48
kLv
0.1
wy
0.05
0.05
scale
01
m
m
X
terminal 1
index area
D
E
A
B
detail X
A
A
1
A
3
C
y
C
y
1
54
terminal 1
index area
D
h
L
b
k
e
A
C
B
v
C
w
2
1
0.20
0.27
0.22
0.17
y
1
X2SON5: plastic thermal enhanced extremely thin small outline package; no leads;
5 terminals; body 0.8 x 0.8 x 0.35 mm
3
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P22
74AUP1G86GN,132
Mfr. #:
Buy 74AUP1G86GN,132
Manufacturer:
Nexperia
Description:
Logic Gates OR 4.6 V 20 mA
Lifecycle:
New from this manufacturer.
Delivery:
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