MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________________________________________________________________________________
7
-20
-120
1k 10k
MAX7490
THD + NOISE vs. FREQUENCY
MAX7490-13
INPUT FREQUENCY (Hz)
THD + NOISE (dB)
-30
-40
-50
-60
-70
-80
-90
-100
-110
B
A
A = MODE 1
B = MODE 3
-90
-80
-70
-60
-50
-40
-30
-20
-10
01.00.5 1.5 2.0 2.5 3.0
MAX7491
THD + NOISE vs. INPUT VOLTAGE
MAX7490-14
INPUT VOLTAGE (Vp-p)
THD + NOISE (dB)
B
A
A = MODE 1
B = MODE 3
-90
-80
-70
-60
-50
-40
-30
-20
-10
012345
MAX7490
THD + NOISE vs. INPUT VOLTAGE
MAX7490-15
INPUT VOLTAGE (Vp-p)
THD + NOISE (dB)
B
A
A = MODE 1
B = MODE 3
2.0
3.0
2.5
3.5
4.0
4.5
5.0
084121620
OUTPUT VOLTAGE SWING
vs. LOAD RESISTANCE
MAX7490-16
R
LOAD
(k
Ω
) TO COM
OUTPUT SWING (Vp-p)
V
DD
= 5V
V
DD
= 3V
0
500
1500
1000
2000
2500
0400200 600 800 1000
INTERNAL OSCILLATOR PERIOD
vs. SMALL CAPACITANCE
MAX7490-17
CAPACITANCE (pF)
INTERNAL OSCILLATOR FREQUENCY (kHz)
V
DD
= 3V
V
DD
= 5V
0
20
40
60
80
100
120
140
160
132 4567
INTERNAL OSCILLATOR PERIOD
vs. LARGE CAPACITANCE
MAX7490-18
CAPACITANCE (nF)
INTERNAL OSCILLATOR FREQUENCY (kHz)
V
DD
= 5V
V
DD
= 3V
126
128
127
130
129
132
131
133
3.0 4.03.5 4.5 5.0 5.5
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX7490-19
V
DD
(V)
INTERNAL OSCILLATOR FREQUENCY (kHz)
C
OSC
= 1000pF
124
130
128
126
132
134
136
138
140
142
144
-40 10-15 35 60 85
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
MAX7490-20
TEMPERATURE (°C)
INTERNAL OSCILLATOR FREQUENCY (kHz)
V
DD
= 3V
V
DD
= 5V
C
OSC
= 1000pF
Typical Operating Characteristics (continued)
(V
DD
= +5V for MAX7490, V
DD
= +3V for MAX7491, f
CLK
= 625kHz, V
SHDN
= V
EXTCLK
= V
DD
, COM = V
DD
/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, T
A
= +25°C, unless otherwise noted.)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
8 _______________________________________________________________________________________
_______________Detailed Description
The MAX7490/MAX7491 are universal switched-capaci-
tor filters designed with a fixed internal f
CLK
/f
O
ratio of
100:1. Operating modes use external resistors connect-
ed in different arrangements to realize different filter
functions (highpass, lowpass, bandpass, notch) in all of
the classical filter topologies (Butterworth, Bessel, ellip-
tic, Chebyshev). Figure 1 shows a block diagram.
Clock Signal
External Clock
The MAX7490/MAX7491 switched-capacitor filters are
designed for use with external clocks that have a 50%
±5% duty cycle. When using an external clock, drive
the EXTCLK pin high or connect to V
DD
. Drive CLK with
CMOS logic levels (GND and V
DD
). Varying the rate of
the external clock adjusts the center frequency of the
filter:
f
O
= f
CLK
/100
Internal Clock
When using the internal oscillator, drive the EXTCLK pin
low or connect to GND and connect a capacitor (C
OSC
)
between CLK and GND. The value of the capacitor
(C
OSC
) determines the oscillator frequency as follows:
f
OSC
(kHz) = 135 x 10
3
/ C
OSC
(pF)
Since C
OSC
is in the low picofarads, minimize the stray
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the frequency of the
internal oscillator adjusts the filter’s center frequency by
a 100:1 clock-to-center frequency ratio. For example,
an internal oscillator frequency of 135kHz produces a
nominal center frequency of 1.35kHz.
NAME
PIN
FILTER A FILTER B
FUNCTION
LP_ 1 16 2nd-Order Lowpass Filter Output
BP_ 2 15 2nd-Order Bandpass Filter Output
N_/HP_ 3 14 2nd-Order Notch/Highpass Filter Output
INV_ 4 13 Inverting Input of Filter Summing Op Amp
S_ 5 12
Summing Input. The connection of the summing input, along with the other
resistor connections, determine the circuit topology (mode) of each 2nd-
order section. S_ must never be left unconnected.
SHDN 6
Shutdown Input. Drive SHDN low to enable shutdown mode; drive SHDN
high or connect to V
DD
for normal operation.
GND 7 Ground Pin
V
DD
8
Positive Supply. Bypass V
DD
with a 0.1µF capacitor to GND. A low-noise
supply is recommended. Input +5V for MAX7490 or +3V for MAX7491.
CLK 9
Clock Input. Connect CLK to an external capacitor (C
OSC
) between CLK and
ground to set the internal oscillator frequency. For external clock operation,
drive CLK with a CMOS-level clock. The duty cycle of the external clock
should be between 45% and 55% for best performance.
EXTCLK 10
External/Internal Clock Select Input. Connect EXTCLK to V
DD
when driving
CLK externally. Connect EXTCLK to GND when using the internal oscillator.
COM 11
Common Pin. Biased internally at V
DD
/2. Bypass externally to GND with
0.1µF capacitor. To override the internal biasing, drive COM with an external
low-impedance source.
Pin Description
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________________________________________________________________________________ 9
2nd-Order Filter Stage
The MAX7490/MAX7491 are dual biquad filters. The
biquad topology allows the use of standard filter tables
and equations to implement simultaneous lowpass,
bandpass, and notch or highpass filters. Topologies
such as Butterworth, Chebyshev, Bessel, elliptic, as
well as custom algorithms are possible.
Internal Common Voltage
The COM pin sets the common-mode input voltage and
is internally biased to V
DD
/2 with a resistor-divider. The
resistors used are typically 250kΩ for the MAX7490,
and typically 80kΩ for the MAX7491. The common-
mode voltage is easily overdriven by an external volt-
age supply if desired. Bypass COM to the analog
ground with at least a 0.1µF capacitor.
Inverting Inputs
Locate resistors that are connected to INV_ as close as
possible to INV_ to reduce stray capacitance and noise
pickup. INV_ are inverting inputs to continuous-time op
amps, and behave like a virtual ground. There is no
sampling energy present on these inputs.
Outputs
Each switched-capacitor section, together with two to
four external resistors, can generate all standard 2nd-
order functions: bandpass, lowpass, highpass, and
notch (band-reject) functions. Three of these functions
are simultaneously available. The maximum signal
swing is limited by the power-supply voltages used.
The amplifiers’ outputs in the MAX7490/MAX7491 are
able to swing to within approximately 0.2V of either
supply.
Driving coaxial cable, large capacitive loads, or total
resistive loads less than 10kΩ will degrade the total
harmonic distortion (THD) performance. Note that the
effective resistive load at the output must include both
the feedback resistors and any external load resistors.
Low-Power Shutdown Mode
The MAX7490/MAX7491 have a shutdown mode that is
activated by driving SHDN low. In shutdown mode, the
filter supply current reduces to < 1µA (max), and the fil-
ter outputs become high impedance. The COM input
also becomes high impedance during shutdown. For
normal operation, drive SHDN high or connect to V
DD
.
__________Applications Information
Designing with the MAX7490/MAX7491 begins by
selecting the mode that best fits the desired circuit
requirements. Table 1 lists the available modes and
their relative advantages and disadvantages. Table 2
lists the different nomenclature used in the explanations
that follow.
Σ
NA/HPA (3)
SHDN
V
DD
(8)
GND (7)
CLK (9)
EXTCLK (10)
INVB (13)
COM (11)
R
R
INVA (4)
(6)
SA (5)
BPA (2) LPA (1)
+
-
Σ
NB/HPB (14)
SB (12)
BPB (15) LPB (16)
+
-
Figure 1. Block Diagram

MAX7491CEE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Active Filter Dual Universal Switched-Cap
Lifecycle:
New from this manufacturer.
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