NCP5318
http://onsemi.com
26
As with any power design, proper laboratory testing
should be performed to insure the design will dissipate the
required power under worst case operating conditions.
Variables considered during testing should include
maximum ambient temperature, minimum airflow,
maximum input voltage, maximum loading and component
variations (i.e., worst case MOSFET R
DS(on)
). Also, the
inductors and capacitors share the MOSFET’s heatsinks and
will add heat and raise the temperature of the circuit board
and MOSFET. For any new design, it is advisable to have as
much heatsink area as possible. All too often, new designs are
found to be too hot and require re−design to add heatsinking.
7. Error Amplifier Tuning
The high frequency gain of the voltage feedback loop
affects transient response and control loop stability. This
loop gain can be adjusted by changing the Error Amplifier’s
high frequency gain, which is done by increasing or
decreasing the Error Amplifier output loading capacitor
(C
AMP
). The Error Amplifier has a transconductance
characteristic (amplifier output current is proportional to
amplifier input voltage), causing amplifier output voltage to
be proportional to amplifier output load impedance.
If C
AMP
is too large, the loop gain at high frequencies will
be too low, and the converter output voltage may exhibit an
underdamped response to a load transient. On the other
hand, if C
AMP
is too small, there will be too much loop gain
at high frequencies, which may decrease converter output
voltage stability. For initial prototype startup, C
AMP
= 10 nF
is recommended. When reducing C
AMP
, peak−to−peak
ripple voltage at the COMP pin should remain less than
20 mVp−p. Excessive ripple at the COMP pin will
contribute to PWM pulse jitter. In general, the lowest loop
gain that achieves acceptable transient response should be
used.
Adding a resistor in series with C
AMP
will increase control
loop damping in response to load transients as shown in
Figures 26 and 27, where 1430 W was added in series with
the 1.8 nF C
AMP
(Adaptive Voltage Positioning not used).
Figure 26. Converter Output and COMP Response to
a Load Step (No Droop). 0 W in Series with C
AMP
Figure 27. Converter Output and COMP Response to
a Load Step (No Droop), Resistance in Series with
C
AMP
Current
LOAD CURRENT, 60 A/DIV
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE, 50 mV/DIV
OUTPUT VOLTAGE, 50 mV/DIV
COMP VOLTAGE, 100 mV/DIV
COMP VOLTAGE, 100 mV/DIV
20 mS/DIV
20 mS/DIV
