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NCP5318FTR2G

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NCP5318
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28
Resistor R
FB
is connected between V
OUT
and the V
FB
pin
of the controller. At no load, this resistor will conduct the
very small internal bias current of the V
FB
pin. Therefore
R
FB
should be kept below 10 kW to avoid output voltage
error due to the input bias current. If the R
FB
resistor is kept
small, the V
FB
bias current can be ignored.
Resistor R
DRP
is connected between the V
DRP
and V
FB
pins of the controller. At no load, V
DRP
, V
FB
and V
OUT
are
at the same potential, and no current should flow through
R
DRP
or R
FB
. As load current increases, the voltage at the
V
DRP
pin rises. The the R
DRP
and R
FB
resistors cause the
voltage at V
OUT
to fall in order to keep the voltage at the V
FB
pin close to the reference voltage. Figure 30 shows the
DC effect of AVP.
−0.14
−0.06
−0.02
0
V
OUT
(V)
0
I
OUT
(A)
10 60
−0.04
−0.08
−0.10
−0.12
20 30 40 50
V
OUT
− VID
Spec Min
Spec Max
Figure 30. The DC Effects of AVP vs. Load
To choose components, select the appropriate resistor
ratio based on the desired loadline and sense resistor. At no
load, the output voltage is positioned 19 mV below the DAC
output setting. The output voltage droop will follow the
equation:
R
DRP
R
FB
+ g
R
SENSE
R
LL
(eq. 30)
where:
g = gain of the current sense amplifiers (V/V);
R
SENSE
= resistance of the sense element (mW);
R
LL
= load line resistance (mW).
It is easiest to select a value for R
FB
and then evaluate the
equation to find R
DRP
. R
LL
is simply the desired output
voltage droop divided by the output current. If a sense
resistor is used to detect inductor current, then R
SENSE
will
be the value of the sense resistor. If inductor sensing is used,
R
SENSE
will be the resistance of the inductor. Refer to the
discussion on Current Sensing for further information.
Depending on inductor ESR and the loadline desired,
adding a capacitor on the order of 1 nF in parallel with R
DRP
may improve the transient output voltage waveshape.
Figure 31. Output Voltage − No Capacitor
in Parallel with R
DRP
Figure 32. Output Voltage – 1.2 nF Capacitor
in Parallel with R
DRP
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE, 50 mV/DIV
VDRP VOLTAGE, 200 mV/DIV
5 mS/DIV
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE, 50 mV/DIV
VDRP VOLTAGE, 200 mV/DIV
5 mS/DIV
NCP5318
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29
9. Current Sensing
Current sensing is used to balance current between
different phases, to limit the maximum phase current and to
limit the maximum system current. Since the current
information is a part of the control loop, better stability is
achieved if the current information is accurate and
noise−free. The NCP5318 uses differential current sense
amplifiers to achieve the best possible performance.
Two sense lines are routed for each phase, as shown in
Figure 29.
For inductive current sensing, choose the current sense
network (R
CSx
, C
CSx
, x = 1, 2, 3 or 4) to satisfy
R
CSx
C
CSx
+
Lo
R
L
(eq. 31)
where R
L
is the inductor ESR. This will provide an adequate
starting point for R
CSx
and C
CSx
. After the converter is
constructed, the value of R
CSx
(and/or C
CSx
) should be
fine−tuned in the lab by observing the V
DRP
signal during a
step change in load current. Tune the R
CSx
x C
CSx
network
by varying R
CSx
to provide a “square−wave” at the V
DRP
output pin with maximum rise time and minimal overshoot
as shown in Figure 35.
For resistive current sensing, choose the current sense
network (R
CSx
, C
CSx
, x = 1, 2, 3, or 4) to reject noise spikes,
but maintain the fidelity of the triangular current waveform.
Figure 33. V
DRP
tuning waveforms. The RC time
constant of the current sense network is too long
(Slow): V
DRP
and V
OUT
respond too slowly.
Figure 34. V
DRP
tuning waveforms. The RC time
constant of the current sense network is too short
(Fast): V
DRP
and V
OUT
both overshoot.
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE, 50 mV/DIV
VDRP VOLTAGE,
500 mV/DIV
200 mS/DIV
VDRP VOLTAGE,
200 mV/DIV
200 mS/DIV
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE,
50 mV/DIV
Figure 35. V
DRP
tuning waveforms. The RC time
constant of the current sense network is optimal:
V
DRP
and V
OUT
respond to the load current quickly
without overshooting.
VDRP VOLTAGE,
200 mV/DIV
200 mS/DIV
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE,
50 mV/DIV
NCP5318
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30
10. Current Limit Setting
When the output of the current sense amplifier (COx in the
block diagram) exceeds the voltage on the I
LIM
pin, the part
will latch off. For inductive sensing, the I
LIM
pin voltage
should be set based on the inductor’s maximum resistance
(R
LMAX
). The design must consider the inductor’s
resistance increase due to current heating and ambient
temperature rise. Also, depending on the current sense
points, the circuit board may add additional resistance. In
general, the temperature coefficient of copper is +0.39% per
°C. If using a current sense resistor (R
SENSE
), the I
LIM
pin
voltage should be set based on the maximum value of the
sense resistor.
For the overcurrent protection to avoid false tripping, the
voltage at the I
LIM
pin should be set even higher if the
R
CSx
x C
CSx
time constant is set faster than the L
O
/ R
L
time
constant. A step load change may cause the current signal to
appear larger than the actual inductor current and trip the
current limit at a lower level than desired. The waveforms in
Figure 36 show a simulation of the current sense signal and
the actual inductor current during a positive step in load
current with values of L = 500 nH, R
L
= 1.6 mW, R
CSx
=
20 kW, and C
CSx
= 0.01 m F. In this case, ideal current signal
compensation would require V
CSx
to be 31 k. Due to the
faster than ideal RC time constant, there is an overshoot of
50% and the overshoot decays with a 200 ms time constant.
With this compensation, the I
LIM
pin threshold must be set
more than 50% above the full load current to avoid
triggering current limit during a large output load step.
Figure 36. Inductive sensing waveform during a load
step with fast RC time constant (50
ms/div)
The proper I
LIM
pin voltage can be calculated by:
V
ILIM
+ (I
RIPP−P
ń(2 #PH) ) I
L
) R
L
(1 ) 0.004
(T
L
* 25)) g ) OS
ILIM
where:
I
L
= maximum converter current (A)
R
L
= maximum 25°C sense element
resistance (W)
g = maximum current sense to I
LIM
gain
(see tabulated specs)
I
RIPP−P
= peak−to−peak phase ripple current (A)
#PH = number of phases
T
L
= inductor temperature at overload (°C)
OS
ILIM
= maximum I
LIM
offset
(see tabulated specs) (V)
This voltage can be programmed by a resistor divider
from the R
OSC
pin, as shown in Figure 37.
Figure 37. Programming the Current Limit
R
OSC
I
LIM
R1
R2
When the NCP5318 is powered up, the R
OSC
pin will be
1.0 V. This allows the user to determine the resistor divider
above by:
R2 = R
TOTAL
x V
LIM
/ 1.0 V
R1 = R
TOTAL
− R2
Where R
TOTAL
is determined as in Section 1 above.
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NCP5318FTR2G

Mfr. #:
Buy NCP5318FTR2G
Manufacturer:
ON Semiconductor
Description:
Switching Controllers 2/3/4 Phase Buck CPU
Lifecycle:
New from this manufacturer.
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