3
LTC1530
1530fa
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OUT
Output Voltage LTC1530IS8-1.9 (Note 4) 1.881 1.9 1.919 V
● 1.862 1.9 1.938 V
LTC1530IS8-2.5 (Note 4) 2.475 2.5 2.525 V
● 2.450 2.5 2.550 V
LTC1530IS8-2.8 (Note 4) 2.772 2.8 2.828 V
● 2.744 2.8 2.856 V
LTC1530IS8-3.3 (Note 4) 3.267 3.3 3.333 V
● 3.234 3.3 3.366 V
∆V
OUT
Output Load Regulation I
OUT
= 0 to 14A –5 mV
Output Line Regulation V
IN
= 4.75V to 5.25V, I
OUT
= 0 ±1mV
I
PVCC
Operating Supply Current Figure 3, V
FB
= 0V (Note 8) 15 mA
Quiescent Current Figure 3, COMP = 0.5V, V
FB
= 5V ● 1.0 1.4 mA
Shutdown Supply Current Figure 3, COMP = 0 (Note 9) ● 45 80 µA
f
OSC
Internal Oscillator Frequency Figure 4 ● 250 300 350 kHz
Oscillator Valley Voltage V
COMP
at 0% Duty Cycle 2.5 V
Oscillator Peak Voltage V
COMP
at Max Duty Cycle 3.5 V
G
ERR
Error Amplifier Open-Loop DC Gain (Note 5) ● 40 54 dB
g
mERR
Error Amplifier Transconductance (Note 5) ● 1.6 2 2.8 millimho
I
MAX
I
MAX
Sink Current V
IMAX
= 5V 170 200 230 µA
V
IMAX
= 5V ● 120 200 300 µA
I
MAX
Sink Current Tempco V
IMAX
= 5V 3300 ppm/°C
V
SHDN
Shutdown Threshold Voltage Figure 4, Measured at COMP Pin (Note 9) ● 100 180 mV
SR
SS
Internal Soft-Start Slew Rate Figure 4, COMP Pulls High, V
FB
= 0V 0.4 V/ms
(Notes 9, 10)
t
SS
Internal Soft-Start Wake-Up Time Figure 4, COMP Pulls High to G1↑ (Note 10) 3.5 ms
t
r
, t
f
Driver Rise and Fall Time Figure 4 ● 90 140 ns
t
NOL
Driver Nonoverlap Time Figure 4 ● 30 100 ns
DC
MAX
Maximum G1 Duty Cycle Figure 4 ● 81 86 %
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: If I
FB
is taken below GND, it is clamped by an internal diode. This
pin handles input currents ≤ 100mA below GND without latch-up. In the
positive direction, it is not clamped to PV
CC
.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4: The LTC1530 is tested in an op amp feedback loop which
regulates V
SENSE
or V
OUT
based on V
COMP
= 2V for the error amplifier.
Note 5: The Open-loop DC gain and transconductance from the V
FB
pin to
the COMP pin are G
ERR
and g
mERR
respectively. For fixed output voltage
versions, the actual open-loop DC gain and transconductance are G
ERR
and g
mERR
multiplied by the ratio 1.235/V
OUT
.
Note 6: The total voltage from the PV
CC
pin to the GND pin must be ≥8V
for the current limit protection circuit to be active.
Note 7: G1 and G2 begin to switch once PV
CC
is ≥ the undervoltage
lockout threshold voltage.
Note 8: Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This current varies
with the LTC1530 operating frequency, supply voltage and the external
FETs used.
Note 9: The LTC1530 enters shutdown if COMP is pulled low.
Note 10: Slew rate is measured at the COMP pin on the transition from
shutdown to active mode.
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. PV
CC
= 12V unless otherwise noted. (Note 3)
ELECTRICAL CHARACTERISTICS
