MP20073DH-LF-Z

MP20073
2A, 1.3V–6.0V
DDR Memory Termination Regulator
MP20073 Rev. 1.0 www.MonolithicPower.com 1
10/16/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
The Future of Analog IC Technology
DESCRIPTION
The MP20073 integrates the DDR memory
termination regulator with the output voltage
(VTT) and a buffered VTTREF outputs is a half
of VREF.
The VTT-LDO is a 2A sink/source tracking
termination regulator. It is specifically designed
for low-cost/low-external component count
systems, where space is a premium.
The MP20073 maintains a fast transient
response only requiring 20µF (2x10µF) of
ceramic output capacitance. The MP20073
supports Kelvin sensing functions.
The MP20073 is available in the 8-pin MSOP
with Exposed PAD package and is specified
from -40
o
C to 85
o
C.
FEATURES
VDDQ Voltage Range: 1.3V to 6.0 V
Up to 2A Integrated Sink/Source Linear
Regulator with Accurate VREF/2 Divider
Reference for DDR Termination
Requires Only 20µF Ceramic Output
Capacitance
Drive Voltage : 3.3V
1.3V Input (VDDQ) Helps Reduce Total
Power Dissipation
Integrated Divider Tracks VREF for VTT
and VTTREF
Kelvin Sensing (VTTSEN)
±30mV Accuracy for VTT and VTTREF
Built-In Soft-Start, UVLO and OCL
Thermal Shutdown
APPLICATIONS
Notebook DDR2/3 Memory Supply and
Termination Voltage in ACPI Compliant
Active Termination Busses
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VTTEN
MP20073
REF
VDRV
VTTREF
VTTSEN
VTT
VDDQ
DDQ
3.3V
6
1
3
EN
GND
R3
20
R2
100k
5
7
VTTREF
VTT
C9
NC
8
4
2
MP20073 – 2A, 1.3V-6.0V INPUT, DDR MEMORY TERMINATION REGUALTOR
MP20073 Rev. 1.0 www.MonolithicPower.com 2
10/16/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking Free Air Temperature (T
A
)
MP20073DH MSOP8E 20073
-40C to +85C
* For Tape & Reel, add suffix –Z (e.g. MP20073DH–Z);
For RoHS Compliant Packaging, add suffix –LF (e.g. MP20073DH–LF–Z)
PACKAGE REFERENCE
DDQ
VTT
GND
VTTSEN
1
2
3
4
8
7
6
5
VTTREF
EN
REF
VDRV
TOP VIEW
EXPOSED PAD
ON BACKSIDE
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage V
DDQ
...................... -0.3V to 6.0V
Drive Voltage VDRV..................... -0.3V to 6.0V
All Other Pins................................ -0.3V to 6.0V
Continuous Power Dissipation (T
A
= +25°C)
(2)
........................................................... 1.56W
Junction Temperature...............................150
o
C
Lead Temperature ....................................260
o
C
Storage Temperature .............. -50
o
C to +150
o
C
Recommended Operating Conditions
(3)
Drive Voltage VDRV.......................... 3.3V to 5V
Operating Junct. Temp (T
J
) ......-40
o
C to +125
o
C
Thermal Resistance
(4)
θ
JA
θ
JC
MSOP8E.................................. 80...... 12...
o
C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T
J
(MAX), the junction-to-
ambient thermal resistance θ
JA
, and the ambient temperature
T
A
. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by P
D
(MAX)=(T
J
(MAX)-
T
A
)/ θ
JA
. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its operating
conditions.
4) Measured on JESD51-7 4-layer board.
MP20073 – 2A, 1.3V-6.0V INPUT, DDR MEMORY TERMINATION REGUALTOR
MP20073 Rev. 1.0 www.MonolithicPower.com 3
10/16/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VDRV = 3.3V, TA = +25
o
C, unless otherwise noted.
Parameters Symbol Test Condition Min Typ Max Unit
VDRV Operating Voltage VDRV - 3 3.3 5 V
VDRV Shut down current IDRV_SD VDRV =3.3 V, VDDQ=0V - 0.2 1.0
A
VDRV Operation Current IDRV VEN_H, VTT=0.75V 1.3 3 mA
Thermal Trip Point TSD
- 150 -
o
C
Hysteresis TSDHYS
- 25 -
o
C
VDDQ UVLO Upper
Threshold
VDDQUV+ Rising Edge; hysteresis = 55mV - 0.9 1.3 V
1/2VREF – VTT, VREF = 1.8V,
IVTT = 0 to 2A (Sink Current)
IVTT = 0 to 2A (Source Current)
-30
-30
-
-
30
30
mV
VTT with Respect to 1/2VREF dVTT0
1/2VREF – VTT, VREF = 1.5V,
IVTT = 0 to 2.5A (Sink Current)
IVTT = 0 to 2.5A (Source Current)
-30
-30
-
-
30
30
mV
Source Current Limit ILIMVTsrc - - 3.0 - A
Sink Current Limit ILIMVTsnk - - 3.0 - A
SoftStart Source Current
Limit
ILIMVTSS - - 1.0 - A
VREF=1.8, VDRV=3.3V - 9 -
Maximum SoftStart Time tssvttmax
VREF=1.5V, VDRV=3.3V - 7
us
VTTREF Source Current IVTTR VREF = 1.8 V or 1.5 V 10 - - mA
1/2VREF – VTTR,
VREF = 1.8 V,
IVTTR = 0 mA to 10 mA
-18 - 18 mV
VTTREF Accuracy Referred
to 1/2VREF
dVTTR
1/2VREF – VTTR,
VREF = 1.5 V,
IVTTR = 0 mA to 10 mA
-15 - 15 mV
VEN Pin Threshold High VEN_H - 1.4 - - V
VEN Pin Threshold Low VEN_L - - - 0.5 V
VEN Pin Input Current IIN_VEN VEN = 3.3 V - - 1.0
A

MP20073DH-LF-Z

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Power Management Specialized - PMIC 2A 1.3-6V DDR Memory Termination Reg
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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