PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 3 of 9
NXP Semiconductors
PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
7. Characteristics
P
tot
total power dissipation T
amb
≤ 25 °C
[1]
- 250 mW
T
j
junction temperature - 150 °C
T
amb
ambient temperature −65 +150 °C
T
stg
storage temperature −65 +150 °C
Table 5. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
thermal resistance from
junction to ambient
in free air
[1]
- - 500 K/W
Table 7. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
I
CBO
collector-base cut-off
current
V
CB
=40V; I
E
= 0 A - - 100 nA
V
CB
=50V; I
E
= 0 A - - 100 nA
I
CEO
collector-emitter cut-off
current
V
CE
=50V; I
B
= 0 A - - 0.5 µA
I
EBO
emitter-base cut-off
current
V
EB
=5V; I
C
= 0 A - - 0.8 mA
h
FE
DC current gain V
CE
=5V; I
C
=50mA 70 - -
V
CEsat
collector-emitter
saturation voltage
I
C
= 50 mA; I
B
= 2.5 mA - - 0.3 V
V
I(off)
off-state input voltage V
CE
=5V; I
C
= 100 µA 0.3 0.6 1 V
V
I(on)
on-state input voltage V
CE
= 0.3 V; I
C
= 20 mA 0.4 0.8 1.4 V
R1 bias resistor 1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 9 10 11
C
c
collector capacitance V
CB
=10V; I
E
=i
e
=0A;
f = 100 MHz
-7-pF