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PCA8575_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 21 March 2007 10 of 30
NXP Semiconductors
PCA8575
Remote 16-bit I/O expander for I
2
C-bus with interrupt
Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge phase is valid (output mode).
Fig 13. Read input port register, scenario 2
1 0 0 A2 A1 A0 1 AS0
START condition R/W
acknowledge
from slave
002aab811
A
acknowledge
from master
SCL
SDA
A
read from port 0
data into port 0
INT
A 1
no acknowledge
from master
P
DATA 10 DATA 12
t
v(D)
t
d(rst)
987654321
P0x
DATA 00
acknowledge
from master
P1x
DATA 10
P0x
DATA 03
acknowledge
from master
P1x
DATA 12
data into port 1
DATA 00
read from port 1
DATA 11
t
h(D)
DATA 01
t
h(D)
DATA 02
t
su(D)
DATA 03
t
su(D)
PCA8575_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 21 March 2007 11 of 30
NXP Semiconductors
PCA8575
Remote 16-bit I/O expander for I
2
C-bus with interrupt
8.4 Power-on reset
When power is applied to V
DD
, an internal Power-On Reset (POR) holds the PCA8575 in
a reset condition until V
DD
has reached V
POR
. At that point, the reset condition is released
and the PCA8575 registers and I
2
C-bus/SMBus state machine will initialize to their default
states. Thereafter V
DD
must be lowered below 0.2 V to reset the device.
8.5 Interrupt output (INT)
The PCA8575 provides an open-drain interrupt (INT) which can be fed to a corresponding
input of the microcontroller (see Figure 12, Figure 13, and Figure 14). This gives these
chips a kind of master function which can initiate an action elsewhere in the system.
An interrupt is generated by any rising or falling edge of the port inputs. After time t
v(D)
the
signal INT is valid.
The interrupt disappears when data on the port is changed to the original setting or data is
read from or written to the device which has generated the interrupt.
In the Write mode, the interrupt may become deactivated (HIGH) on the rising edge of the
write to port pulse. On the falling edge of the write to port pulse the interrupt is definitely
deactivated (HIGH).
The interrupt is reset in the Read mode on the rising edge of the read from port pulse.
During the resetting of the interrupt itself, any changes on the I/Os may not generate an
interrupt. After the interrupt is reset any change in I/Os will be detected and transmitted as
an INT.
Fig 14. Application of multiple PCA8575s with interrupt
002aac676
V
DD
MICROCOMPUTER
INT
PCA8575
INT
PCA8575
INT
device 1 device 2
PCA8575
INT
device 8
PCA8575_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 21 March 2007 12 of 30
NXP Semiconductors
PCA8575
Remote 16-bit I/O expander for I
2
C-bus with interrupt
9. Characteristics of the I
2
C-bus
The I
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
9.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 15).
9.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see Figure 16.)
9.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see Figure 17).
Fig 15. Bit transfer
mba607
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig 16. Definition of START and STOP conditions
mba608
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition

PCA8575PW,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - I/O Expanders 16-BIT I2C FM QB
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New from this manufacturer.
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