74HC_HCT1G32_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 8 August 2012 6 of 12
NXP Semiconductors 74HC1G32-Q100; 74HCT1G32-Q100
2-input OR gate
[1] t
pd
is the same as t
PLH
and t
PHL
.
[2] C
PD
is used to determine the dynamic power dissipation P
D
(W).
P
D
=C
PD
V
CC
2
f
i
+ (C
L
V
CC
2
f
o
)where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
(C
L
V
CC
2
f
o
) = sum of outputs
12. Waveforms
74HCT1G32-Q100
t
pd
propagation delay A and B to Y; see Figure 5
[1]
V
CC
= 4.5 V; C
L
=50pF - 10 24 - 27 ns
V
CC
= 5.0 V; C
L
=15pF - 10 - - - ns
C
PD
power dissipation
capacitance
V
I
=GNDtoV
CC
1.5 V
[2]
-20- - -pF
Table 8. Dynamic characteristics
…continued
GND = 0 V; t
r
= t
f
6.0 ns. All typical values are measured at T
amb
=25
C. For test circuit see Figure 6
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
For 74HC1G32-Q100: V
M
= 0.5 V
CC
; V
I
= GND to V
CC
For 74HCT1G32-Q100: V
M
= 1.3 V; V
I
= GND to 3.0 V
Fig 5. The input (A and B) to output (Y) propagation delays
mna167
A, B input
Y output
t
PHL
t
PLH
V
M
V
M
Measurement points are given in Tab le 8. Definitions for test circuit:
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
Fig 6. Load circuitry for switching times
mna101
V
CC
V
I
V
O
R
T
C
L
PULSE
GENERATOR
DUT
