MAX817L/M, MAX818L/M, MAX819L/M*
+5V Microprocessor Supervisory Circuits
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +4.75V to +5.5V for MAX81_L, V
CC
= +4.5V to +5.5V for MAX81_M, V
BATT
= 2.8V, T
A
= T
MIN
to T
MAX
, unless otherwise
noted. Typical values are at T
A
= +25°C.)
Power-down
V
CC
= 5V
I
OUT
= -1µA, V
CC
= 0V, V
BATT
= 2.8V
I
OUT
= -100µA, V
CC
= 0V
Enable mode
Disable mode
CONDITIONS
µs15
RESET to CE OUT Delay
3.5V
IL
CE OUT Input Threshold
V
0.8V
IH
V
2.7
V
OH
CE OUT Output
V
CC
- 1V
Ω40 150
CE IN to CE OUT Resistance
(Note 6)
µA±0.005 ±1
CE IN Leakage Current
UNITSMIN TYP MAXSYMBOLPARAMETER
Note 2: Either V
CC
or V
BATT
can go to 0V if the other is greater than 2.0V.
Note 3: “-” = battery-charging current, “+” = battery-discharging current.
Note 4: WDI is internally serviced within the watchdog timeout period if WDI is left unconnected.
Note 5: WDI input is designed to be driven by a three-stated output device. To float WDI, the “high-impedance mode” of the output
device must have a maximum leakage current of 10µA and a maximum output capacitance of 200pF. The output device
must also be able to source and sink at least 200µA when active.
Note 6: The chip-enable resistance is tested with V
CC
= +4.75V for the MAX818L and V
CC
= +4.5V for the MAX818M.
V
CE IN
= V
CE OUT
= V
CC
/2.
Note 7: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT.
Disable mode, CE OUT = 0V
mA0.1 0.75 2.0
CE OUT Short-Circuit Current
(Reset Active)
50Ω source impedance driver, C
LOAD
= 50pF ns38
CE IN to CE OUT Propagation
Delay (Note 7)
CHIP-ENABLE GATING (MAX818 only)
