4
0°C TO 85°C TEMPERATURE RANGE
IDTCSP2510D
3.3V PHASE-LOCK LOOP CLOCK DRIVER
DC ELECTRICAL CHARACTERISTICS OVER OPERATING FREE-AIR TEMPERA-
TURE RANGE
(1)
Symbol Description Test Conditions VDD Min. Typ.
(2)
Max. Unit
VIK Input Clamp Voltage II = -18mA 3V ⎯⎯– 1.2 V
VIH Input HIGH Level ⎯ 2 ⎯⎯ V
VIL Input LOW Level ⎯⎯⎯0.8 V
IOH = -100μA Min. to Max. VDD – 0.2 ⎯⎯
V
OH HIGH Level Output Voltage IOH = -12mA 3V 2.1 ⎯⎯ V
IOH = -6mA 3V 2.4 ⎯⎯
I
OL = 100μA Min. to Max. ⎯⎯0.2
V
OL LOW Level Output Voltage IOL = 12mA 3V ⎯⎯0.8 V
IOL = 6mA 3V ⎯⎯0.55
II Input Current VI = VDD or GND 3.6V ⎯⎯±5 μA
I
DD Supply Current VI = VDD or GND, AVDD = GND, 3.6V ⎯⎯10 μA
IO = 0, Outputs: LOW or HIGH
ΔIDD Change in Supply Current One input at VDD - 0.6V, other inputs at VDD or GND 3.3V to 3.6V ⎯⎯500 μA
CPD Power Dissipation Capacitance 3.6V ⎯ 10 14 pF
I
DDA
(3)
AVDD Power Supply Current AVDD = 3.3V ⎯ 10 ⎯ mA
NOTES:
1. For Industrial devices, operating free-air temperature = -40°C to +85°C.
2. For conditions shown as Min. or Max., use the appropriate value specified under recommended operating conditions.
3. For IDD of AVDD, see TYPICAL CHARACTERISTICS.
Min. Max. Unit
Clock frequency 50 175 MHz
fCLOCK Input clock duty cycle 40% 60%
Stabilization time
(2)
⎯ 1ms
TIMING REQUIREMENTS OVER OPERATING RANGE OF SUPPLY VOLTAGE AND
OPERATING FREE-AIR TEMPERATURE
(1)
NOTES:
1. For Industrial devices, operating free-air temperature = -40°C to +85°C.
2. Time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal. For phase lock to be obtained, a fixed-frequency, fixed-phase
reference signal must be present at CLK. Until phase lock is obtained, the specifications for propagation delay, skew, and jitter parameters given in the switching characteristics
table are not applicable.
