LTC1657/LTC1657L
7
1657lfa
For more information www.linear.com/LTC1657
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1657 Supply Current
vs Logic Input Voltage
LTC1657L Supply Current
vs Logic Input Voltage
LTC1657 Supply Current
vs Temperature
LTC1657L Supply Current
vs Temperature
LTC1657
Large-Signal Transient Response
LTC1657L
Large-Signal Transient Response
LTC1657L Full-Scale Voltage
vs Temperature
LTC1657 Offset Error
vs Temperature
LTC1657L Offset Error
vs Temperature
TEMPERATURE (°C)
55
2.490
FULL-SCALE VOLTAGE (V)
2.495
2.500
2.505
2.510
25 5 35 65
1657 G10
95 125
TEMPERATURE (°C)
55
10 35 80 125
OFFSET (mV)
1657 G11
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
TEMPERATURE (°C)
55
10 35 80 125
OFFSET (mV)
1657 G12
1.0
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
– 0.8
–1.0
LOGIC INPUT VOLTAGE (V)
0
1 2 3 4 5
SUPPLY CURRENT (mA)
1657 G13
8
7
6
5
4
3
2
1
0
V
CC
= 5V
LOGIC INPUT VOLTAGE (V)
0
0.2
SUPPLY CURRENT (mA)
0.4
0.8
1.0
1.2
2
2.0
1657 G14
0.6
1 3
1.4
1.6
1.8
V
CC
= 3V
TEMPERATURE (°C)
55 35 15 5 25 45 65 85 105 125
SUPPLY CURRENT (µA)
1657 G15
700
680
660
640
620
600
580
560
540
520
500
V
CC
= 5.5V
V
CC
= 5V
V
CC
= 4.5V
TEMPERATURE (°C)
55 35 15 5 25 45 65 85 105 125
SUPPLY CURRENT (µA)
1657 G16
560
550
540
530
520
510
500
490
480
470
460
V
CC
= 3.3V
V
CC
= 3V
V
CC
= 2.7V
TIME (20µs/DIV)
OUTPUT VOLTAGE (V)
1657 G17
5
4
3
2
1
0
V
OUT
UNLOADED
T
A
= 25°C
TIME (20µs/DIV)
0
OUTPUT VOLTAGE (V)
2
4
1
3
5
1657 G18
V
OUT
UNLOADED
T
A
= 25°C
LTC1657/LTC1657L
8
1657lfa
For more information www.linear.com/LTC1657
WR (Pin 1): Write Input (Active Low). Used with CSMSB
and/or CSLSB to control the input registers. While WR
and CSMSB and/or CSLSB are held low, data writes into
the input register.
CSLSB (Pin 2): Chip Select Least Significant Byte (Active
Low). Used with WR to control the LSB 8-bit input registers.
While WR and CSLSB are held low, the LSB byte writes
into the
LSB input register. Can be connected to CSMSB
for simultaneous loading of both sets of input latches on
a 16-bit bus.
CSMSB (Pin 3): Chip Select Most Significant Byte (Ac-
tive Low). Used with WR to control the MSB 8-bit input
registers. While WR and CSMSB are held low, the MSB
byte writes into the MSB input register. Can be connected
to CSLSB for simultaneous loading of both
sets of input
latches on a 16-bit bus.
D0 to D7 (Pins 4 to 11): Input data for the Least Significant
Byte. Written into LSB input register when WR = 0 and
CSLSB = 0.
D8 to D15 (Pins 12 to 19): Input data for the Most Signifi-
cant Byte. Written into MSB input register when WR=0
and CSMSB = 0.
GND (Pin 20): Ground.
LTC1657 0.1Hz to 10Hz
Voltage Noise
LTC1657L 0.1Hz to 10Hz
Voltage Noise
TYPICAL PERFORMANCE CHARACTERISTICS
PIN FUNCTIONS
TIME (SEC)
0
1µV/DIV
8
1659 G19
2 4 6 1071 3 5 9
TIME (SEC)
0
1µV/DIV
8
1659 G20
2 4 6 1071 3 5 9
REFLO (Pin 21): Lower input terminal of the DAC’s internal
resistor ladder. Typically connected to Analog Ground. An
input code of (0000)
H
will connect the positive input of
the output buffer to this end of the ladder. Can be used
to offset the zero scale above ground.
REFHI (Pin 22): Upper input terminal of the DAC’s internal
resistor ladder. Typically connected to REFOUT. An input
code of
(FFFF)
H
will connect the positive input of the output
buffer to 1LSB below this voltage.
REFOUT (Pin 23): Output of the internal reference is 2.048V
(LTC1657), 1.25V (LTC1657L). Typically connected to
REFHI to drive internal DAC resistor ladder.
V
CC
(Pin 24): Positive Power Supply Input. 4.5VV
CC
5.5V (LTC1657), 2.7VV
CC
≤ 5.5V (LTC1657L). Requires
a 0.1µF bypass capacitor to ground.
V
OUT
(Pin 25): Buffered DAC Output.
X1/X2 (Pin 26): Gain Setting Resistor Pin. Connect to GND
for G = 2 or to V
OUT
for G = 1. This pin should always be
tied to a low impedance source, such as ground or V
OUT
,
to ensure stability of the output buffer when driving ca-
pacitive loads.
LTC1657/LTC1657L
9
1657lfa
For more information www.linear.com/LTC1657
PIN FUNCTIONS
CLR (Pin 27): Clear Input (Asynchronous Active Low). A
low on this pin asynchronously resets all input and DAC
registers to 0s.
CLR CSMSB CSLSB WR LDAC FUNCTION
L X X X X Clears input and DAC registers to zero
H X X X L Loads DAC register with contents of input registers
H X X X H Freezes contents of DAC register
H L H L X Writes MSB byte into MSB input register
H H L L X Writes LSB byte into LSB input register
H L L L X Writes MSB and LSB bytes into MSB and LSB input registers
H X X H X Inhibits write to MSB and
LSB input registers
H H X X X Inhibits write to MSB input register
H X H X X Inhibits write to LSB input register
H L L L L Data bus flows directly through input and DAC registers
DIGITAL INTERFACE TRUTH TABLE
LDAC (Pin 28): Load DAC (Asynchronous Active Low).
Used to asynchronously transfer the contents of the input
registers to the DAC register which updates the output
voltage. If held low, the DAC register loads data from the
input registers which will immediately update V
OUT
.
TIMING DIAGRAM
CSMSB
WR
LDAC
1657 TD
t
CS
CSLSB
DATA
t
CS
t
WR
t
WR
t
CWS
t
CWH
t
DWS
t
LDAC
DAC UPDATE
t
DWH
DATA VALID DATA VALID

LTC1657LIGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Parallel 16-B R2R uP DAC
Lifecycle:
New from this manufacturer.
Delivery:
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