4
REV. 1.0.5 7/22/04
FAN5009 PRODUCT SPECIFICATION
Electrical Specifications
V
CC
= 12V, and T
A
= 25°C using circuit in Figure 2 unless otherwise noted. The • denotes specifications which apply
over the full operating temperature range.
Figure 2. Test Circuit
Parameter Symbol Conditions Min. Typ. Max. Units
Input Supply
VCC Voltage Range V
CC
6.4 12 13.5 V
VCC Current I
CC
OD
= 0V 3.5 8 mA
Bootstrap Diode
Continuous Forward Current I
F(AVG)
•25mA
Reverse Breakdown Voltage V
R
•15 V
Reverse Recovery Time
2
t
RR
10 ns
Forward Voltage
2
V
F
I
F
= 10mA 0.8 0.95 V
OD Input
Input High Voltage V
IH (OD
)
2.5 V
Input Low Voltage V
IL (OD
)
0.8 V
Input Current I
OD
OD = 3.0V –300 +300 nA
Propagation Delay
2
t
pdl(OD
)
See Figure 3 30 40 ns
t
pdh(OD
)
30 45 ns
PWM
Input
Input High Voltage V
IH(PWM)
3.5 V
Input Low Voltage V
IL(PWM)
0.8 V
Input Current I
IL(PWM)
•-1 +1
µ
A
High-Side Driver
Output Resistance, Sourcing
Current
R
HUP
V
BOOT
–V
SW
= 12V 3.8 4.4
Output Resistance, Sinking
Current
R
HDN
V
BOOT
–V
SW
= 12V 1.4 1.8
Transition Times
2,4
t
R(HDRV)
See Figure 2 40 55 ns
t
F(HDRV)
20 30 ns
Propagation Delay
2,3
t
pdh(HDRV)
See Figure 2, and 4 50 65 ns
t
pdl(HDRV)
25 40 ns
FAN5009
1
2
3
4
8
7
6
5
HDRV
SW
PGND
LDRV
BOOT
PWM
OD
VCC
12V
33K10K
3000pf
3000pf
1µf
PRODUCT SPECIFICATION FAN5009
REV. 1.0.5 7/22/04
5
Electrical Specifications
(continued)
NOTES:
1. All limits at operating temperature extremes are guaranteed by design, characterization and statistical quality control
2. AC Specifications guaranteed by design/characterization (not production tested).
3. For propagation delays, “tpdh” refers to low-to-high signal transition and “tpdl” refers to high-to-low signal transition
4. Transition times are defined for 10% and 90% of DC values
Figure 3. Output Disable Timing
Figure 4. Adaptive Gate Drive Timing
Parameter Symbol Conditions Min. Typ. Max. Units
Low-Side Driver
Output Resistance, Sourcing
Current
R
LUP
3.4 4.0
Output Resistance, Sinking
Current
R
LDN
1.4 1.8
Transition Times
2,4
t
R(LDRV)
See Figure 2 40 50 ns
t
F(LDRV)
20 30 ns
Propagation Delay
2,3
t
pdh(LDRV)
See Figures 2, 4 20 30 ns
t
pdl(LDRV)
25 40 ns
t
pdh(ODRV)
See Adaptive Gate
Drive Circuit
description
240 ns
V
IL(OD)
t
pdl(OD)
V
IH(OD)
t
pdh(OD)
LDRV / HDRV
OD
V
IH(PWM)
t
pdl(LDRV)
LDRV
PWM
HDRV-SW
1.2V
V
IL(PWM)
t
pdl(HDRV)
2.2V
t
pdh(LDRV)
SW
t
pdh(HDRV)
6
REV. 1.0.5 7/22/04
FAN5009 PRODUCT SPECIFICATION
Typical Characteristics
0
10
20
30
40
50
60
70
1,000 2,000 3,000 4,000 5,000
C
LOAD
(pF)
Time (nsec)
C
LOAD
(pF)
Time (nsec)
T
FALL
T
RISE
T
RISE
0
10
20
30
40
50
60
70
1,000 2,000 3,000 4,000 5,000
T
FALL
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
0255075100 125
Temperature (°C)
Z (normalized)
Source
Sink
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
0255075100 125
Temperature (°C)
Z (normalized)
PWM
HDRV
LDRV
PWM
HDRV
LDRV
Source
Sink
Gate Drive Rise and Fall Times
HDRV Rise/Fall Times vs. C
LOAD
LDRV Rise/Fall Times vs. C
LOAD
HDRV Impedance vs. Temperature (normalized) LDRV Impedance vs. Temperature (normalized)

FAN5009M

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Gate Drivers ANG FG Dual Bootstrp 12V MOSFET Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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