NTTS2P03R2G

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4
t
r
t, TIME (ns)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
t
d
(off)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage
versus Current
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Diode Reverse Recovery Waveform
V
DS
= 0 V V
GS
= 0 V
T
J
= 25°C
C
iss
C
rss
C
oss
C
iss
C
rss
V
DD
= −24 V
I
D
= −2.48 A
V
GS
= −10 V
t
f
t
d
(on)
V
GS
= 0 V
T
J
= 25°C
di/dt
t
rr
t
a
t
p
I
S
0.25 I
S
TIME
I
S
t
b
1
0
0.90.80.70.60.50.4
0.5
1
1.5
2.5
3
−V
SD,
SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1
10010
1
10
100
R
G,
GATE RESISTANCE (OHMS)
30
−10
1200
1000
−5
0 5 10 15
800
600
200
0
−I
S,
SOURCE CURRENT (AMPS)
C, CAPACITANCE (pF)
−V
DS
−V
GS
QT
Q2Q1
V
GS
I
D
= −2.48 A
T
J
= 25°C
V
DS
0
80
3
6
1
4
246 10 16
Q
g
, TOTAL GATE CHARGE (nC)
30
25
20
15
10
5
0
−V
DS,
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
12
2
−V
GS,
GATE−TO−SOURCE VOLTAGE (VOLTS)
0.1
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.01
1
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
V
GS
= 30 V
SINGLE PULSE
T
C
= 25°C
10
dc
1
100
100
10
10 ms
1 ms
0.1
20 25
400
14
5
2
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5
TYPICAL ELECTRICAL CHARACTERISTICS
Figure 13. Thermal Response
t, TIME (s)
100
10
1
D = 0.5
SINGLE PULSE
1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 1.0E+01
0.2
0.05
0.01
1.0E+02 1.0E+03
0.1
1000
0.1
0.02
R
q
JC
(t) = r(t) R
q
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
− T
C
= P
(pk)
R
q
JC
(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE (°C/W)
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6
PACKAGE DIMENSIONS
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
Micro8
CASE 846A−02
ISSUE F
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
8X
8X
6X
ǒ
mm
inches
Ǔ
SCALE 8:1
1.04
0.041
0.38
0.015
5.28
0.208
4.24
0.167
3.20
0.126
0.65
0.0256
S
B
M
0.08 (0.003) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 2.90 3.10 0.114 0.122
B 2.90 3.10 0.114 0.122
C −−− 1.10 −−− 0.043
D 0.25 0.40 0.010 0.016
G 0.65 BSC 0.026 BSC
H 0.05 0.15 0.002 0.006
J 0.13 0.23 0.005 0.009
K 4.75 5.05 0.187 0.199
L 0.40 0.70 0.016 0.028
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. 846A−01 OBSOLETE, NEW STANDARD 846A−02.
−B−
−A−
D
K
G
PIN 1 ID
8 PL
0.038 (0.0015)
−T−
SEATING
PLANE
C
H
J
L
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NTTS2P03R2G

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MOSFET -30V -2.48A P-Channel
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