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NCP5010FCT1G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 2
1 Publication Order Number:
NCP5010/D
NCP5010
500 mW Boost Converter for
White LEDs
The NCP5010 is a fixed frequency PWM boost converter with
integrated rectification optimized for constant current applications
such as driving white LEDs. This device features small size, minimal
external components and high−efficiency for use in portable
applications and is capable of providing up to 500 mW output power
to 2−5 series connected white LEDs. A single resistor sets the LED
current and the CTRL pin can be pulse width modulated (PWM) to
reduce the LED Current.
The device includes True−Cutoff circuitry to disconnect the load
from the battery when the device is put into standby mode. To protect
the device, an output overvoltage protection, and short circuit
protection have been incorporated. The NCP5010 is housed in a low
profile, space efficient 1.7 x 1.7 mm Flip−Chip package. The device
has been optimized for use with small inductors and ceramic
capacitors.
Features
• 2.7 to 5.5 V Input Voltage Range
• Efficiency: 84% for 5 LED (V
F
= 3.5 V by LED) at 30 mA and
4.2 V V
IN
• Low Noise 1 MHz PWM DC−DC Converter
• Open LED Protection and Short Circuit Protection
• Serial LEDs Architecture for Uniform Current Matching
• 1 mA Shutdown Current Facility with True−Cutoff
• Very Small 8−Pin Flip−Chip 1.7 x 1.7 mm Package
• This is a Pb−Free Device
Typical Applications
• White LED Backlighting for Small Color LCD Displays
• Cellular Phones
• Digital Cameras
• MP3 Players
• High Efficiency Step−up Converter
8−Pin Flip−Chip
FC SUFFIX
CASE 499AJ
PIN CONNECTIONS
AGND
A1
MARKING
DIAGRAM
DAX = Specific Device Code
G = Pb−Free Package
A = Assembly Location
Y = Year
WW = Work Week
Top View
See detailed ordering and shipping information in the packag
e
dimensions section on page 16 of this data sheet.
ORDERING INFORMATION
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1
DAXG
AYWW
A1
A2 A3
B1 B3
C1 C2 C3
CTRL NC
V
IN
FB
V
OUT
SW PGND
Figure 1. Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
1 10 100
EFFICIENCY (%)
V
OUT
= 5 LED (18 V)
V
OUT
= 3 LED (11 V)
V
IN
= 4.2 V
I
OUT
(mA)
NCP5010
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2
NCP5010
AGND
A1 B1
C1
CTRL
A2
NC
A3
FB
B3
PGND
C3
SW
C2
L1
2.7 to 5.5 V
X5R 6.3V
X5R 25V
LED
LED
2 to 5 LEDs
C
in
4.7 mF 0603
22 mH
C
out
1 mF 0805
R
fb
24
V
bat
V
OUT
V
IN
Figure 2. Typical Application Circuit
ENABLE
PIN FUNCTION DESCRIPTION
PIN PIN NAME TYPE DESCRIPTION
A1 AGND POWER System ground for the analog circuitry. A high quality ground must be provided to avoid spikes and/
or uncontrolled operations. This pin is to be connected to the PGND pin.
B1 V
IN
POWER Power Supply Input. A ceramic capacitor with a minimum value of 1 mF/6.3 V (X5R or X7R) must be
connected to this pin. This capacitor should be placed as close as possible to this pin. In addition,
one end of the external inductor is to be connected at this point.
C1 V
OUT
POWER DC−DC converter output. This pin should be directly connected to the load and a low ESR
(<30 mW) 1 mF (min) 25 V bypass capacitor. This capacitor is required to smooth the current flowing
into the load, thus limiting the noise created by the fast transients present in this circuit. Since this is
a current regulated output, this pin has over voltage protection to protect from open load conditions.
Care must be taken to avoid EMI through the PCB copper tracks connected to this pin.
A2 CTRL INPUT An Active High logic level on this pin enables the device. A built−in pulldown resistor disables the
device if the pin is left open. This pin can also be used to control the average current into the load
by applying a low frequency PWM signal. If a PWM signal is applied, the frequency should be high
enough to avoid optical flicker but be no greater than 1 kHz.
C2 SW POWER Power switch connection for inductor. Typical application will use a coil from 10 mH to 22 mH and
must be able to handle at least 350 mA. If the desired output power is above 300 mW, the inductor
should have a DCR < 1.4 W.
A3 NC N/A Not Connected
B3 FB INPUT Feedback voltage input used to close the loop by means of a sense resistor connected between the
primary LED branch and the ground. The output current tolerance is depends upon the accuracy of
this resistor and a ±5% or better accuracy metal film resistor is recommended. An analog dimming
signal can be applied to this point to reduce the output current. Please refer to the application
section for additional details.
C3 PGND POWER Power ground. A high quality ground must be used to avoid spikes and/or uncontrolled operation.
Care must be taken to avoid high−density current flow in a limited PCB copper track. This pin is to
be connected to the AGND pin.
NCP5010
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3
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage (Note 2) V
IN
7.0 V
Over Voltage Protection V
OUT
24 V
Human Body Model (HBM) ESD Rating (Note 3) ESD HBM 2000 V
Machine Model (MM) ESD Rating (Note 3) ESD MM 200 V
Digital Input Voltage
Digital Input Current
CTRL −0.3 < V
IN
< V
bat
+0.3
1.0
V
mA
Power Dissipation @ T
A
= +85 °C P
D
150 mW
Thermal Resistance Junction−to−Air
8−Pin Flip−Chip Package
R
q
JA
(Note 6)
°C/W
Operating Ambient Temperature Range T
A
−40 to +85 °C
Operating Junction Temperature Range T
J
−40 to +125 °C
Storage Temperature Range T
stg
−65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T
A
= 25°C.
2. According to JEDEC standard JESD22−A108B.
3. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115 for all pins.
4. Latchup Current Maximum Rating: ±100 mA per JEDEC standard: JESD78.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
6. For the 8−Pin Flip−Chip CSP Package, the R
q
JA
is highly dependent on the PCB Heatsink area. For example R
q
JA
can be to 195°C/W with
50 mm total area and also 135°C/W with 500 mm. All the bumps have the same thermal resistance and need to be connected thereby optimizing
the power dissipation.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

NCP5010FCT1G

Mfr. #:
Buy NCP5010FCT1G
Manufacturer:
ON Semiconductor
Description:
IC LED DRVR RGLTR DIM 8FLIPCHIP
Lifecycle:
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