Nexperia
74HC374; 74HCT374
Octal D-type flip-flop; positive edge-trigger; 3-state
74HC_HCT374 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 3 — 20 February 2018
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5 Pinning information
5.1 Pinning
74HC374
74HCT374
OE V
CC
Q0 Q7
D0 D7
D1 D6
Q1 Q6
Q2 Q5
D2 D5
D3 D4
Q3 Q4
GND CP
aaa-028158
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
Figure 5. Pin configuration SO20
74HC374
74HCT374
aaa-028159
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
OE V
CC
Q0 Q7
D0 D7
D1 D6
Q1 Q6
Q2 Q5
D2 D5
D3 D4
Q3 Q4
GND CP
Figure 6. Pin configuration (T)SSOP20
5.2 Pin description
Table 2. Pin description
Symbol Pin Description
D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data inputs
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 data outputs
OE 1 output enable input (active LOW)
CP 11 clock pulse input (active rising edge)
GND 10 ground (0 V)
V
CC
20 supply voltage
6 Functional description
Table 3. Function table
[1]
Input OutputOperating mode
OE CP Dn
Internal
flip-flops
Qn
L ↑ l L LLoad and read register
L ↑ h H H
H ↑ l L ZLoad register and disable outputs
H ↑ h H Z
[1] H = HIGH voltage level;
L = LOW voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
Z = high-impedance OFF-state;
↑ = LOW-to-HIGH clock transition.