OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

CY7C4291-10JXC

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
CY7C4281
CY7C4291
Document #: 38-06007 Rev. *C Page 10 of 16
First Data Word Latency after Reset with Read and Write
Notes:
18. When t
SKEW1
> minimum specification, t
FRL
(maximum) = t
CLK
+ t
SKEW2
. When t
SKEW1
< minimum specification, t
FRL
(maximum) = either 2*t
CLK
+ t
SKEW1
or t
CLK
+ t
SKEW1
. The Latency Timing applies only at the Empty Boundary (EF = LOW).
19. The first word is available the cycle after EF
goes HIGH, always.
Switching Waveforms (continued)
D
0
(FIRST VALID WRITE)
t
SKEW1
WEN1
WCLK
Q
0
–Q
8
EF
REN1,
REN2
OE
t
OE
t
ENS
t
OLZ
t
DS
RCLK
t
REF
t
A
t
FRL
D
1
D
2
D
3
D
4
D
0
D
1
D
0
–D
8
t
A
WEN2
(if applicable)
[18]
[19]
[+] Feedback
CY7C4281
CY7C4291
Document #: 38-06007 Rev. *C Page 11 of 16
Empty Flag Timing
Switching Waveforms (continued)
DATA WRITE 2
DATA WRITE 1
t
SKEW1
DATA IN OUTPUT REGISTER
WCLK
Q
0
–Q
8
EF
REN1,
REN2
OE
t
DS
RCLK
t
REF
t
A
t
FRL
D
0
–D
8
DATA READ
t
SKEW2
t
FRL
t
REF
t
DS
WEN2
(if applicable)
ENS
t
REF
LOW
[18] [18]
t
ENS
WEN1
t
ENH
t
ENS
t
ENH
t
ENS
t
ENH
t
t
ENH
[+] Feedback
CY7C4281
CY7C4291
Document #: 38-06007 Rev. *C Page 12 of 16
Full Flag Timing
Programmable Almost Empty Flag Timing
Notes:
20. t
SKEW2
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of
WCLK and the rising RCLK is less than t
SKEW2
, then PAE may not change state until the next RCLK.
21. PAE offset = n.
22. If a read is performed on this rising edge of the read clock, there will be Empty + (n −1) words in the FIFO when PAE
goes LOW.
Switching Waveforms (continued)
Q
0
–Q
8
REN1,
REN2
WEN1
WEN2
(if applicable)
D
0
–D
8
NEXT DATA READ
DATA WRITE
NO WRITE
DATA IN OUTPUT REGISTER
FF
WCLK
OE
RCLK
t
A
DATA READ
t
SKEW1
t
DS
t
ENS
t
ENH
t
WFF
t
A
t
SKEW1
t
ENS
t
ENH
t
WFF
DATA WRITE
NO WRITE
t
WFF
LOW
[13]
[13]
t
ENH
WCLK
PAE
RCLK
t
CLKH
t
ENS
t
CLKL
t
ENS
t
PAE
N + 1 WORDS
IN FIFO
t
ENH
t
ENS
t
ENH
t
ENS
t
PAE
REN1,
REN2
WEN1
WEN2
(if applicable)
t
SKEW2
[20]
Note 21
Note 22
[+] Feedback
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

CY7C4291-10JXC

Mfr. #:
Buy CY7C4291-10JXC
Manufacturer:
Cypress Semiconductor
Description:
IC DEEP SYNC FIFO 128KX9 32-PLCC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet